# US 8,772,768 B2 · Semiconductor device and method for manufacturing

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- Number: US 8,772,768 B2
- Document ID: US8772768B2
- Status: Granted
- Kind: B2
- Application number: 13/330,801
- Filed: 2011-12-20
- Published: 2012-06-28
- Granted: 2014-07-08
- Earliest claimed: 2010-12-28
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Shunpei Yamazaki
- Inventors: Shunpei Yamazaki
- Web page: https://patentgrep.com/patent/US8772768B2

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 30/6715: {characterised by the doping profiles, e.g. having lightly-doped source or drain extensions}
- H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 62/40: Crystalline structures
- H10D 62/60: Impurity distributions or concentrations
- H10D 64/514: {characterised by the insulating layers}
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering
- H10P 14/3426: {Oxides}
- H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)}
- H10P 30/22: using masks
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device in which fluctuation in electric characteristics due to miniaturization is less likely to be caused is provided. The semiconductor device includes an oxide semiconductor film including a first region, a pair of second regions in contact with side surfaces of the first region, and a pair of third regions in contact with side surfaces of the pair of second regions; a gate insulating film provided over the oxide semiconductor film; and a first electrode that is over the gate insulating film and overlaps with the first region. The first region is a CAAC oxide semiconductor region. The pair of second regions and the pair of third regions are each an amorphous oxide semiconductor region containing a dopant. The dopant concentration of the pair of third regions is higher than the dopant concentration of the pair of second regions.

## Claims

### Claim 1

A semiconductor device comprising:
an insulating film;
an oxide semiconductor film on the insulating film, the oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film; and
a first electrode over the gate insulating film and overlapping with the first region,
wherein the first region is a c-axis aligned crystalline oxide semiconductor region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the insulating film contains oxygen in a portion of the insulating film in contact with the oxide semiconductor film and the oxygen is released from the insulating film by heating.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a second electrode electrically connected to one of the pair of third regions; and
a third electrode electrically connected to the other of the pair of third regions.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the second electrode is in contact with a top surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a top surface of the other of the pair of third regions.

### Claim 4 (depends on 2)

The semiconductor device according to claim 2,
wherein the second electrode is in contact with a bottom surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a bottom surface of the other of the pair of third regions.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the gate insulating film overlaps with the first region, the pair of second regions, and the pair of third regions.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1,
wherein the gate insulating film is an oxide insulating film.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein the pair of second regions and the pair of third regions comprise one or more elements selected from nitrogen, phosphorus, and arsenic as the dopant, and
wherein the dopant concentration of the pair of second regions and the dopant concentration of the pair of third regions are higher than or equal to 5×1018 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1,
wherein the pair of second regions and the pair of third regions comprise one or more elements selected from nitrogen, phosphorus, and arsenic as the dopant,
wherein the dopant concentration of the pair of second regions is higher than or equal to 5×1018 atoms/cm3 and lower than 5×1019 atoms/cm3, and
wherein the dopant concentration of the pair of third regions is higher than or equal to 5×1019 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1,
wherein the oxide semiconductor film comprises two or more elements selected from In, Ga, Sn, and Zn.

### Claim 10

A semiconductor device comprising:
an insulating film;
an oxide semiconductor film on the insulating film, the oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film;
a first electrode over the gate insulating film and overlapping with the first region; and
a first sidewall insulating film and a second sidewall insulating film located on side surfaces of the first electrode,
wherein the first sidewall insulating film overlaps with one of the pair of second regions, and the second sidewall insulating film overlaps with the other of the pair of second regions,
wherein the first region is a c-axis aligned crystalline oxide semiconductor region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the insulating film contains oxygen in a portion of the insulating film in contact with the oxide semiconductor film and the oxygen is released from the insulating film by heating.

### Claim 11 (depends on 10)

The semiconductor device according to claim 10, further comprising:
a second electrode electrically connected to one of the pair of third regions; and
a third electrode electrically connected to the other of the pair of third regions.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11,
wherein the second electrode is in contact with a top surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a top surface of the other of the pair of third regions.

### Claim 13 (depends on 11)

The semiconductor device according to claim 11,
wherein the second electrode is in contact with a bottom surface of the one of the pair of third regions, and
wherein the third electrode is in contact with a bottom surface of the other of the pair of third regions.

### Claim 14 (depends on 10)

The semiconductor device according to claim 10,
wherein the gate insulating film overlaps with the first region, the pair of second regions, and the pair of third regions.

### Claim 15 (depends on 10)

The semiconductor device according to claim 10,
wherein the gate insulating film is an oxide insulating film, and
wherein each of the first sidewall insulating film and the second sidewall insulating film is a nitride insulating film.

### Claim 16 (depends on 10)

The semiconductor device according to claim 10,
wherein each of the gate insulating film, the first sidewall insulating film and the second sidewall insulating film is an oxide insulating film.

### Claim 17 (depends on 10)

The semiconductor device according to claim 10,
wherein the pair of second regions and the pair of third regions comprise one or more elements selected from nitrogen, phosphorus, and arsenic as the dopant, and
wherein the dopant concentration of the pair of second regions and the dopant concentration of the pair of third regions are higher than or equal to 5×1018 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3.

### Claim 18 (depends on 10)

The semiconductor device according to claim 10,
wherein the pair of second regions and the pair of third regions comprise one or more elements selected from nitrogen, phosphorus, and arsenic as the dopant,
wherein the dopant concentration of the pair of second regions is higher than or equal to 5×1018 atoms/cm3 and lower than 5×1019 atoms/cm3, and
wherein the dopant concentration of the pair of third regions is higher than or equal to 5×1019 atoms/cm3 and lower than or equal to 1×1022 atoms/cm3.

### Claim 19 (depends on 10)

The semiconductor device according to claim 10,
wherein the oxide semiconductor film comprises two or more elements selected from In, Ga, Sn, and Zn.

### Claim 20

A semiconductor device comprising:
an insulating film;
an oxide semiconductor film on the insulating film, the oxide semiconductor film comprising:
a first region;
a pair of second regions, the first region located between the pair of second regions; and
a pair of third regions, the first region and the pair of second regions located between the pair of third regions;
a gate insulating film over the oxide semiconductor film; and
a first electrode over the gate insulating film and overlapping with the first region,
wherein the first region comprises crystals of which a c-axis is substantially aligned in a direction perpendicular to a surface of the first region,
wherein each of the pair of second regions and the pair of third regions is an amorphous oxide semiconductor region comprising a dopant,
wherein a dopant concentration of the pair of third regions is higher than a dopant concentration of the pair of second regions, and
wherein the insulating film contains oxygen in a portion of the insulating film in contact with the oxide semiconductor film and the oxygen is released from the insulating film by heating.

### Claim 21

A semiconductor device comprising:
a base insulating film;
an oxide semiconductor film on an insulating surface of the base insulating film, the oxide semiconductor film including a channel formation region and a pair of impurity regions with the channel formation region therebetween, wherein the oxide semiconductor film comprises indium and zinc;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the channel formation region of the oxide semiconductor film with the gate insulating film interposed therebetween; and
first insulating films on side surfaces of the gate electrode, the first insulating films comprising silicon nitride,
wherein each of the pair of impurity regions comprises a first region and a second region, the first region being located between the channel formation region and the second region,
wherein the first regions of the pair of impurity regions are overlapped with the first insulating films while the second regions of the pair of impurity regions are not overlapped with the first insulating films,
wherein the pair of impurity regions of the oxide semiconductor film contains nitrogen at a higher concentration than the channel formation region, and
wherein the base insulating film contains oxygen in a portion of the base insulating film in contact with the oxide semiconductor film and the oxygen is released from the insulating film by heating.

### Claim 22 (depends on 21)

The semiconductor device according to claim 21, wherein the second regions of the pair of impurity regions contain nitrogen at a higher concentration than the first regions.

### Claim 23 (depends on 21)

The semiconductor device according to claim 21, further comprising a second insulating film over the gate electrode,
wherein the second insulating film is in contact with the first insulating films and the second regions of the pair of impurity regions, and
wherein the second insulating film comprises a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride oxide, and silicon nitride.

### Claim 24 (depends on 21)

The semiconductor device according to claim 21, further comprising a transistor having a channel formation region comprising single crystalline silicon, wherein the transistor is operationally connected to the oxide semiconductor film.

### Claim 25 (depends on 21)

The semiconductor device according to claim 21, wherein the oxide semiconductor film comprises In, Ga, and Zn.

### Claim 26

A semiconductor device comprising:
a base insulating film;
an oxide semiconductor film on an insulating surface of the base insulating film, the oxide semiconductor film including a channel formation region and a pair of impurity regions with the channel formation region therebetween, wherein the oxide semiconductor film comprises indium and zinc;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the channel formation region of the oxide semiconductor film with the gate insulating film interposed therebetween; and
first insulating films on side surfaces of the gate electrode, the first insulating films comprising silicon nitride,
wherein each of the pair of impurity regions comprises a first region and a second region, the first region being located between the channel formation region and the second region,
wherein the first regions of the pair of impurity regions are overlapped with the first insulating films while the second regions of the pair of impurity regions are not overlapped with the first insulating films,
wherein the pair of impurity regions of the oxide semiconductor film contains nitrogen at a higher concentration than the channel formation region,
wherein the channel formation region is a c-axis aligned crystal oxide semiconductor region, and
wherein the base insulating film contains oxygen in a portion of the base insulating film in contact with the oxide semiconductor film and the oxygen is released from the base insulating film by heating.

### Claim 27 (depends on 26)

The semiconductor device according to claim 26, wherein the second regions of the pair of impurity regions contain nitrogen at a higher concentration than the first regions.

### Claim 28 (depends on 26)

The semiconductor device according to claim 26, further comprising a second insulating film over the gate electrode,
wherein the second insulating film is in contact with the first insulating films and the second regions of the pair of impurity regions, and
wherein the second insulating film comprises a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride oxide, and silicon nitride.

### Claim 29 (depends on 26)

The semiconductor device according to claim 26, further comprising a transistor having a channel formation region comprising single crystalline silicon, wherein the transistor is operationally connected to the oxide semiconductor film.

### Claim 30 (depends on 26)

The semiconductor device according to claim 26, wherein the oxide semiconductor film comprises In, Ga, and Zn.

### Claim 31 (depends on 26)

The semiconductor device according to claim 26, wherein the pair of impurity regions is amorphous.

### Claim 32

A semiconductor device comprising:
a base insulating film;
an oxide semiconductor film on an insulating surface of the base insulating film, the oxide semiconductor film including a channel formation region and a pair of impurity regions with the channel formation region therebetween, wherein the oxide semiconductor film comprises indium and zinc;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the channel formation region of the oxide semiconductor film with the gate insulating film interposed therebetween; and
first insulating films on side surfaces of the gate electrode and side surfaces of the gate insulating film, the first insulating films comprising silicon nitride,
wherein each of the pair of impurity regions comprises a first region and a second region, the first region being located between the channel formation region and the second region,
wherein the first regions of the pair of impurity regions are on and in contact with the first insulating films while the second regions of the pair of impurity regions are not in contact with the first insulating films,
wherein the pair of impurity regions of the oxide semiconductor film contain nitrogen at a higher concentration than the channel formation region, and
wherein the base insulating film contains oxygen in a portion of the base insulating film in contact with the oxide semiconductor film and the oxygen is released from the base insulating film by heating.

### Claim 33 (depends on 32)

The semiconductor device according to claim 32, wherein the second regions of the pair of impurity regions contain nitrogen at a higher concentration than the first regions.

### Claim 34 (depends on 32)

The semiconductor device according to claim 32, further comprising a second insulating film over the gate electrode,
wherein the second insulating film is in contact with the first insulating films and the second regions of the pair of impurity regions, and
wherein the second insulating film comprises a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride oxide, and silicon nitride.

### Claim 35 (depends on 32)

The semiconductor device according to claim 32, further comprising a transistor having a channel formation region comprising single crystalline silicon, wherein the transistor is operationally connected to the oxide semiconductor film.

### Claim 36 (depends on 32)

The semiconductor device according to claim 32, wherein the oxide semiconductor film comprises In, Ga, and Zn.

### Claim 37

A semiconductor device comprising:
a base insulating film;
an oxide semiconductor film on an insulating surface of the base insulating film, the oxide semiconductor film including a channel formation region, wherein the oxide semiconductor film comprises indium and zinc;
a gate insulating film over the oxide semiconductor film;
a gate electrode over the channel formation region of the oxide semiconductor film with the gate insulating film interposed therebetween, wherein side surfaces of the gate electrode are coextensive with side surfaces of the gate insulating film; and
first insulating films on the side surfaces of the gate electrode and the side surfaces of the gate insulating film, the first insulating films comprising silicon nitride,
wherein the first insulating films are in contact with the oxide semiconductor film,
wherein the oxide semiconductor film extends beyond outer edges of the first insulating films, and
wherein the base insulating film contains oxygen in a portion of the base insulating film in contact with the oxide semiconductor film and the oxygen is released from the base insulating film by heating.

### Claim 38 (depends on 37)

The semiconductor device according to claim 37, further comprising a second insulating film over the gate electrode,
wherein the second insulating film is in contact with the first insulating films and upper portions of the oxide semiconductor film, and
wherein the second insulating film comprises a material selected from the group consisting of silicon oxide, silicon oxynitride, silicon nitride oxide, and silicon nitride.

### Claim 39 (depends on 37)

The semiconductor device according to claim 37, further comprising a transistor having a channel formation region comprising single crystalline silicon, wherein the transistor is operationally connected to the oxide semiconductor film.

### Claim 40 (depends on 37)

The semiconductor device according to claim 37, wherein the oxide semiconductor film comprises In, Ga, and Zn.

### Claim 41 (depends on 37)

The semiconductor device according to claim 37, wherein the channel formation region has crystallinity.

### Claim 42 (depends on 37)

The semiconductor device according to claim 37, wherein the oxide semiconductor film includes portions with the channel formation region therebetween, the portions being amorphous.

### Claim 43 (depends on 37)

The semiconductor device according to claim 37, wherein the channel formation region is a c-axis aligned crystal oxide semiconductor region.

### Claim 44 (depends on 1)

The semiconductor device according to claim 1,
wherein the amount of the released oxygen converted into oxygen atoms is greater than or equal to 1.0×1018 atoms/cm3.