# US 8,772,747 B2 · Composite target sputtering for forming doped phase change materials

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,772,747 B2
- Document ID: US8772747B2
- Status: Granted
- Kind: B2
- Application number: 13/867,525
- Filed: 2013-04-22
- Published: 2013-09-12
- Granted: 2014-07-08
- Earliest claimed: 2011-02-01
- Assignees: Macronix International Co., Ltd.; International Business Machines Corporation
- Applicants: Macronix International Co., Ltd.
- Inventors: Huai-Yu Cheng; Chieh-Fang Chen; Hsiang-Lan Lung; Yen-Hao Shih; Simone Raoux; Matthew J. Breitwisch
- Web page: https://patentgrep.com/patent/US8772747B2

## CPC

- H10N 80/00: Bulk negative-resistance effect devices (integrated devices or assemblies of multiple devices H10N89/00)
- C23C 14/06: characterised by the coating material ({C23C14/0021} , C23C14/04 take precedence)
- C23C 14/0623: {Sulfides, selenides or tellurides}
- C23C 14/3414: {Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy}
- H10B 63/10: Phase change RAM [PCRAM, PRAM] devices
- H10D 48/04: of devices having bodies comprising selenium or tellurium in uncombined form
- H10N 70/026: {by physical vapor deposition, e.g. sputtering}
- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8828: {Tellurides, e.g. GeSbTe}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A layer of phase change material with silicon or another semiconductor, or a silicon-based or other semiconductor-based additive, is formed using a composite sputter target including the silicon or other semiconductor, and the phase change material. The concentration of silicon or other semiconductor is more than five times greater than the specified concentration of silicon or other semiconductor in the layer being formed. For silicon-based additive in GST-type phase change materials, sputter target may comprise more than 40 at % silicon. Silicon-based or other semiconductor-based additives can be formed using the composite sputter target with a flow of reactive gases, such as oxygen or nitrogen, in the sputter chamber during the deposition.

## Claims

### Claim 1

A sputter target, comprising a phase change material and at least 30 at % silicon.

### Claim 2 (depends on 1)

The sputter target of claim 1, wherein the sputter target includes between 40 at % silicon and 60 at % silicon.

### Claim 3 (depends on 1)

The sputter target of claim 1, wherein the sputter target includes GexSbyTez, and between 30 at % silicon and 60 at % silicon.

### Claim 4 (depends on 3)

The sputter target of claim 3, wherein the sputter target includes GexSbyTez, and between 30 at % silicon and 60 at % silicon, where x, y and z are 2, 2 and 5 respectively.

### Claim 5

An integrated circuit including a phase change memory element including a layer of phase change material with a silicon or silicon based additive, the layer being manufactured using a sputter target comprising a phase change material and silicon, the silicon having a concentration in the target more than 30 at %.

### Claim 6 (depends on 5)

The integrated circuit of claim 5, wherein the sputter target includes GexSbyTez, and between 30 at % silicon and 60 at % silicon.

### Claim 7

A sputter target for formation of a layer of phase change material having a specified concentration of an additive element that is reactive with oxygen or nitrogen for formation of a dielectric, the target comprising a phase change material and the additive element, the additive element having a concentration in the target more than five times greater than the specified concentration for the layer.

### Claim 8

An integrated circuit including a phase change memory element including a layer of phase change material and a dielectric, the dielectric comprising a compound of nitrogen or oxygen and an additive element that is reactive with the nitrogen or oxygen, the additive element having a specified concentration for the layer, the layer being manufactured using a sputter target comprising a phase change material and the additive element, the additive element having a concentration in the target more than five times greater than the specified concentration for the layer.

### Claim 9 (depends on 8)

The integrated circuit of claim 8, wherein the sputter target includes GexSbyTez, and between 30 at % silicon and 60 at % silicon.

### Claim 10 (depends on 8)

The integrated circuit of claim 8, wherein the layer of phase change material and dielectric comprises more than 6 at % silicon oxide.
