# US 8,772,698 B2 · CCD-based multi-transistor active pixel sensor array

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- Number: US 8,772,698 B2
- Document ID: US8772698B2
- Status: Granted
- Kind: B2
- Application number: 13/174,245
- Filed: 2011-06-30
- Published: 2012-01-05
- Granted: 2014-07-08
- Earliest claimed: 2010-06-30
- Assignees: Life Technologies Corporation
- Applicants: Keith Fife; Mark Milgrew
- Inventors: Keith Fife; Mark Milgrew
- Web page: https://patentgrep.com/patent/US8772698B2

## CPC

- G01N 27/4148: {Integrated circuits therefor, e.g. fabricated by CMOS processing}
- C12Q 1/6869: Methods for sequencing
- G01N 27/4143: {Air gap between gate and channel, i.e. suspended gate [SG] FETs (work function measurement per se G01N27/002)}
- G01N 27/4145: {specially adapted for biomolecules, e.g. gate electrode with immobilised receptors}
- G01N 33/00: Investigating or analysing materials by specific methods not covered by groups G01N1/00 - G01N31/00
- G01R 29/26: Measuring noise figure; Measuring signal-to-noise ratio
- H04N 25/76: Addressed sensors, e.g. MOS or CMOS sensors
- H10D 48/30: Devices controlled by electric currents or voltages
- H10F 39/026: {Wafer-level processing}
- H10F 39/803: {Pixels having integrated switching, control, storage or amplification elements}
- G01J 1/46: using a capacitor
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- Y10T 436/25875: Gaseous sample or with change of physical state
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- C12Q: MEASURING OR TESTING PROCESSES INVOLVING ENZYMES, NUCLEIC ACIDS OR MICROORGANISMS (immunoassay G01N33/53); COMPOSITIONS OR TEST PAPERS THEREFOR; PROCESSES OF PREPARING SUCH COMPOSITIONS; CONDITION-RESPONSIVE CONTROL IN MICROBIOLOGICAL OR ENZYMOLOGICAL PROCESSES
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- G01J: MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY (light sources F21, H01J, H01K, H05B; investigating properties of materials by optical means G01N)
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A floating electrode is used to detect ions in close proximity to the electrode. The electrode is charge coupled to other electrodes and to other transistors to form a pixel that can be placed into an array for addressable readout. It is possible to obtain gain by accumulating charge into another electrode or onto a floating diffusion (FD) node or directly onto the column line. It is desirable to achieve both a reduction in pixel size as well as increase in signal level. To reduce pixel size, ancillary transistors may be eliminated and a charge storage node with certain activation and deactivation sequences may be used.

## Claims

### Claim 1

An ion sensitive (IS) accumulation pixel circuit to detect a chemical or a bio-chemical reaction, comprising:
a readout circuit;
an IS electrode;
at least two electrodes charge coupled to the IS electrode; and
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage, wherein the floating diffusion node is coupled to the readout circuit.

### Claim 2 (depends on 1)

The IS accumulation pixel circuit of claim 1, wherein one of the at least two electrodes is a reference electrode configured to act as a barrier for charge packets.

### Claim 3 (depends on 1)

The IS accumulation pixel circuit of claim 1, wherein one of the at least two electrodes is a reference electrode configured to act as a well for charge packets.

### Claim 4 (depends on 1)

The IS accumulation pixel circuit of claim 1, wherein the readout circuit comprises one and only one transistor with a source coupled to both the floating diffusion node and a first column line and a drain coupled to a second column line.

### Claim 5 (depends on 4)

The IS accumulation pixel circuit of claim 4, wherein a gate of the one and only one transistor is coupled to a second diffusion node in the IS accumulation pixel circuit.

### Claim 6 (depends on 1)

The IS accumulation pixel circuit of claim 1, wherein the readout circuit comprises two and only two transistors, and wherein the two transistors comprise a reset transistor and a source follower transistor.

### Claim 7 (depends on 6)

The IS accumulation pixel circuit of claim 6, wherein a source of the reset transistor is coupled to the floating diffusion node and a drain of the reset transistor is coupled to a second column line.

### Claim 8 (depends on 7)

The IS accumulation pixel circuit of claim 7, wherein the source follower transistor has a gate coupled to the source of the reset transistor, and a drain coupled to the second column line.

### Claim 9 (depends on 6)

The IS accumulation pixel circuit of claim 6, wherein the reset transistor has a source coupled to a second floating diffusion node, and a drain coupled to a second column line.

### Claim 10 (depends on 9)

The IS accumulation pixel circuit of claim 9, wherein the source follower transistor has a source coupled to the floating diffusion node and a first column line, and a drain coupled to the first column line.

### Claim 11 (depends on 6)

The IS accumulation pixel circuit of claim 6, wherein the reset transistor has a source coupled to the floating diffusion node, and a drain coupled a second column line.

### Claim 12 (depends on 11)

The IS accumulation pixel circuit of claim 11, wherein the source follower transistor has a gate coupled to the source of the reset transistor, a drain coupled to the second column line and a source coupled to a first column line.

### Claim 13 (depends on 1)

The IS accumulation pixel circuit of claim 1, wherein the readout circuit comprises a reset transistor, a source follower transistor and a row selection transistor.

### Claim 14 (depends on 13)

The IS accumulation pixel circuit of claim 13, wherein the reset transistor has a source coupled to the floating diffusion node, and a drain coupled to a second column line.

### Claim 15 (depends on 13)

The IS accumulation pixel circuit of claim 13, wherein the source follower transistor has a gate coupled to a source of the reset transistor, and a drain coupled to a second column line.

### Claim 16 (depends on 13)

The IS accumulation pixel circuit of claim 13, wherein the row selection transistor has a drain coupled to a source of the source follower transistor, and a source coupled to a first column line.

### Claim 17 (depends on 13)

The IS accumulation pixel circuit of claim 13, wherein a source of the row selection transistor is coupled to a sample and hold circuit via a buffer.

### Claim 18 (depends on 13)

The IS accumulation pixel circuit of claim 13, wherein a source of the row selection transistor is coupled to a correlated double sampling circuit via a buffer.

### Claim 19

A pixel array to detect a chemical or a bio-chemical reaction, comprising at least two IS accumulation pixel circuits, wherein each IS accumulation pixel circuit further comprises:
a readout circuit;
an IS electrode;
at least two electrodes charge coupled to the IS electrode; and
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage;
wherein the floating diffusion node is coupled to the readout circuit.

### Claim 20 (depends on 19)

The pixel array of claim 19, wherein the readout circuit comprises one and only one transistor with a source coupled to both the floating diffusion node and a first column line and a drain coupled to a second column line.

### Claim 21 (depends on 19)

The pixel array of claim 19, wherein the readout circuit comprises two and only two transistors, and wherein the two transistors comprise a reset transistor and a source follower transistor

### Claim 22 (depends on 19)

The pixel array of claim 19, wherein the readout circuit comprises a reset transistor, a source follower transistor and a row selection transistor.

### Claim 23

An ion sensitive (IS) accumulation pixel circuit to detect a chemical or a bio-chemical reaction, comprising:
an IS electrode;
at least two electrodes charge coupled to the IS electrode;
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage;
a reset transistor, having a source coupled to the floating diffusion node and a drain coupled to a fixed voltage; and
a transfer transistor, having a drain coupled to the source of the reset transistor.

### Claim 24

A pixel array to detect a chemical or a bio-chemical reaction, comprising:
at least two ion sensitive accumulation pixel circuits, each comprising:
an IS electrode;
at least two electrodes charge coupled to the IS electrode;
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage;
a reset transistor, having a source coupled to the floating diffusion node and a drain coupled to a fixed voltage; and
a transfer transistor, having a drain coupled to the source of the reset transistor; and
a readout circuit, comprising:
a source follower transistor with a gate coupled to sources of the at least two ion sensitive accumulation pixel circuits; and
a row selection transistor with a gate coupled to a row line, a drain coupled to a source of the source follower transistor, and a source coupled to a column line.

### Claim 25

An ion sensitive (IS) accumulation pixel circuit, comprising:
an IS electrode;
at least two electrodes charge coupled to the IS electrode;
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage; and
a transfer transistor, having a drain coupled to the floating diffusion node.

### Claim 26

A pixel array, comprising:
at least two ion sensitive accumulation pixel circuits, each comprising:
an IS electrode;
at least two electrodes charge coupled to the IS electrode;
a floating diffusion node configured to convert an accumulated charge from the chemical or the bio-chemical reaction to a corresponding voltage; and
a transfer transistor, having a drain coupled to the floating diffusion node; and
a readout circuit, comprising:
a reset transistor with a source coupled to the drain of the transfer transistor;
a source follower transistor with a gate coupled to the drain of the transfer transistor; and
a row selection transistor with a gate coupled to a row line, a drain coupled to the source of the source follower transistor, and a source coupled to a column line.