# US 8,772,164 B2 · Method for forming interconnection pattern and semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,772,164 B2 - Document ID: US8772164B2 - Status: Granted - Kind: B2 - Application number: 13/526,216 - Filed: 2012-06-18 - Published: 2013-06-20 - Granted: 2014-07-08 - Earliest claimed: 2011-12-15 - Assignees: Kabushiki Kaisha Toshiba - Applicants: Yasuhito Yoshimizu; Satoshi Wakatsuki; Hisashi Okuchi; Atsuko Sakata; Hiroshi Tomita - Inventors: Yasuhito Yoshimizu; Satoshi Wakatsuki; Hisashi Okuchi; Atsuko Sakata; Hiroshi Tomita - Web page: https://patentgrep.com/patent/US8772164B2 ## CPC - C23C 18/1608: {from pretreatment step, i.e. selective pre-treatment} - C23C 18/1893: {with use of organic or inorganic compounds other than metals, first} - H10D 1/042: {using deposition processes to form electrode extensions} - H10D 1/716: {having vertical extensions} - H10W 20/044: {for electroless plating} - H10W 20/057: {by selectively depositing, e.g. by using selective CVD or plating} - H10W 20/063: {by forming conductive members before forming protective insulating material} - H10W 20/0636: {the conductive members being on sidewalls} - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - C23C 18/32: Coating with nickel, cobalt or mixtures thereof with phosphorus or boron (C23C18/50 takes precedence) - C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract According to one embodiment, a method for forming an interconnection pattern includes forming an insulating pattern, forming a self-assembled film, and forming a conductive layer. The insulating pattern has a side surface on a major surface of a matrix. The self-assembled film has an affinity with a material of the insulating pattern on the side surface of the insulating pattern. The forming the conductive layer includes depositing a conductive material on a side surface of the self-assembled film. ## Claims ### Claim 1 A method for forming an interconnection pattern comprising: forming an insulating pattern having a side surface on a major surface of a matrix; forming a self-assembled film having an affinity with a material of the insulating pattern on the side surface of the insulating pattern; and forming a conductive layer by depositing a conductive material on a side surface of the self-assembled film, the forming the insulating pattern including forming an insulating layer on the major surface if the matrix, forming a mask pattern on the insulating layer, and etching the insulating layer via the mask pattern, and the forming the insulating pattern includes making a width of the insulating pattern thinner than a width of the mask pattern while leaving the mask pattern after etching the insulating layer via the mask pattern. ### Claim 2 (depends on 1) The method according to claim 1, wherein the insulating pattern contains silicon oxide and the self-assembled film contains a silane coupling agent that adsorbs only to the silicon oxide. ### Claim 3 (depends on 1) The method according to claim 1, wherein the forming the insulating pattern includes treatment of hydrogen-terminating the major surface of the matrix. ### Claim 4 (depends on 1) The method according to claim 1, wherein the self-assembled film contains a silanol group and an amino group of a counter group to the silanol group. ### Claim 5 (depends on 1) The method according to claim 1, wherein the forming the conductive layer includes providing a catalyst to the self-assembled film and depositing the conductive material via the catalyst. ### Claim 6 (depends on 5) The method according to claim 5, wherein the catalyst contains palladium. ### Claim 7 (depends on 1) The method according to claim 1, further comprising: covering a portion around the conductive layer with an insulative interlayer film on the major surface; and exposing the conductive layer at a surface of the interlayer film. ### Claim 8 (depends on 7) The method according to claim 7, wherein the exposing the conductive layer includes performing chemical mechanical polishing on a surface of the interlayer film. ### Claim 9 (depends on 1) The method according to claim 1, wherein the matrix includes an underlayer on the major surface side. ### Claim 10 (depends on 1) The method according to claim 1, wherein the underlayer contains silicon nitride. ### Claim 11 A semiconductor device comprising: a matrix, a semiconductor element being provided on the matrix; an insulating pattern provided on a major surface of the matrix and having a side surface above the major surface; a self-assembled film provided on the side surface of the insulating pattern, not being provided on an upper surface of the insulating pattern and having an affinity with a material of the insulating pattern; and a conductive layer provided on a side surface of the self-assembled film. ### Claim 12 (depends on 11) The device according to claim 11, wherein the insulating pattern contains silicon oxide. ### Claim 13 (depends on 11) The device according to claim 11, wherein the self-assembled film contains a silanol group and an amino group of a counter group to the silanol group. ### Claim 14 (depends on 11) The device according to claim 11, wherein a catalyst is provided between the self-assembled film and the conductive layer. ### Claim 15 (depends on 14) The device according to claim 14, wherein the catalyst contains palladium. ### Claim 16 (depends on 11) The device according to claim 11, wherein an underlayer is provided between the matrix and the insulating pattern. ### Claim 17 (depends on 16) The device according to claim 16, wherein the underlayer contains silicon nitride.