# US 8,772,163 B2 · Semiconductor processing method and semiconductor structure

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,772,163 B2
- Document ID: US8772163B2
- Status: Granted
- Kind: B2
- Application number: 13/485,875
- Filed: 2012-05-31
- Published: 2013-12-05
- Granted: 2014-07-08
- Earliest claimed: 2012-05-31
- Assignees: Nanya Technology Corporation
- Applicants: Dennis J. Pretti; Terrence B. McDaniel
- Inventors: Dennis J. Pretti; Terrence B. McDaniel
- Web page: https://patentgrep.com/patent/US8772163B2

## CPC

- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10W 20/082: {the openings being tapered via holes}
- H10W 20/42: Vias, e.g. via plugs
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor processing method that can generate a hole with different diameters, comprising: providing first material and second material different from the first material; and utilizing a etching process to etch the first material and the second material to form a hole through the first material and the second material; wherein the etching process has different etching rates for the first material and the second material such that the hole have different diameters. A semiconductor structure corresponding to the above-mentioned method is also disclosed.

## Claims

### Claim 1

A semiconductor processing method that can generate a single hole with different diameters, comprising:
providing first material and second material different from the first material; and
utilizing a single etching process to etch the first material and the second material to form a single hole through the first material and the second material;
wherein the single etching process has different etching rates for the first material and the second material such that the single hole have different diameters;
where the single hole includes a second portion, and a third portion under the second portion;
wherein the third portion has a diameter smaller than the second portion;
where the second portion touches both the first material and the second material, and the third portion only touches the second material.

### Claim 2 (depends on 1)

The semiconductor processing method of claim 1, wherein the first material is surrounded by the second material.

### Claim 3 (depends on 1)

The semiconductor processing method of claim 1, wherein the first material is nitride, and the second material is oxide.

### Claim 4 (depends on 1)

The semiconductor processing method of claim 1, further comprising:
providing a target device before providing the first material and the second material; and
providing a metal line above the second material, which can be contacted to the target device via the single hole.

### Claim 5 (depends on 1)

The semiconductor processing method of claim 1,
where the single hole further includes a first portion above the second portion;
wherein the second portion has a diameter smaller than the first portion;
where the first portion only touches the second material.

### Claim 6 (depends on 1)

The semiconductor processing method of claim 1, wherein the diameter of the second portion gradually decreases from top to bottom.

### Claim 7

A semiconductor structure having a single hole with different diameters, comprising:
first material;
second material different from the first material; and
a single hole with different diameters, through the first material and the second material, wherein the single hole is formed by a single etching process etching the first material and the second material, wherein the single etching process has a smaller etching rate for the first material than for the second material;
where the single hole includes a second portion, and a third portion under the second portion;
wherein the third portion has a diameter smaller than the second portion;
where the second portion touches both the first material and the second material, and the third portion only touches the second material.

### Claim 8 (depends on 7)

The semiconductor structure of claim 7, wherein the first material is surrounded by the second material.

### Claim 9 (depends on 7)

The semiconductor structure of claim 7, wherein the first material is nitride, and the second material is oxide.

### Claim 10 (depends on 7)

The semiconductor structure of claim 7, further comprising:
a target device under the first material and the second material; and
a metal line above the second material, which can be contacted to the target device via the single hole.

### Claim 11 (depends on 7)

The semiconductor structure of claim 7,
where the single hole further includes a first portion above the second portion;
wherein the second portion has a diameter smaller than the first portion;
where the first portion only touches the second material.

### Claim 12 (depends on 7)

The semiconductor structure of claim 7, wherein the diameter of the second portion gradually decreases from top to bottom.