# US 8,772,149 B2 · FinFET structure and method to adjust threshold voltage in a FinFET structure

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- Number: US 8,772,149 B2
- Document ID: US8772149B2
- Status: Granted
- Kind: B2
- Application number: 13/276,395
- Filed: 2011-10-19
- Published: 2013-04-25
- Granted: 2014-07-08
- Earliest claimed: 2011-10-19
- Assignees: International Business Machines Corporation
- Applicants: Eduard A. Cartier; Brian J. Greene; Dechao Guo; Gan Wang; Yanfeng Wang; Keith Kwong Hon Wong
- Inventors: Eduard A. Cartier; Brian J. Greene; Dechao Guo; Gan Wang; Yanfeng Wang; Keith Kwong Hon Wong
- Web page: https://patentgrep.com/patent/US8772149B2

## CPC

- H10D 30/62: Fin field-effect transistors [FinFET]
- H10D 30/024: {of fin field-effect transistors [FinFET]}
- H10D 64/01302: {the insulator being formed after the semiconductor body, the semiconductor being silicon}
- H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers}
- H10D 86/215: {comprising FinFETs}
- H10P 14/6519: {the substance being oxygen}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

FinFET structures and methods of manufacturing the FinFET structures are disclosed. The method includes performing an oxygen anneal process on a gate stack of a FinFET structure to induce Vt shift. The oxygen anneal process is performed after sidewall pull down and post silicide.

## Claims

### Claim 1

A method comprising performing an oxygen anneal process on a gate stack of a FinFET structure to induce Vt shift and pulling down a sidewall spacer on the gate stack of the FinFET to expose at least a high-k dielectric material formed on a fin of the FinFET structure such that the high-k dielectric material is subjected to the oxygen anneal process, wherein the oxygen anneal process is performed post silicide.

### Claim 2 (depends on 1)

The method of claim 1, wherein the oxygen anneal process is a lateral oxygen diffusion process performed at about 400° C. to about 500° C.

### Claim 3 (depends on 2)

The method of claim 2, wherein the Vt shift is in a range from 0 to 400 mV, where a process window is determined by thermodynamic and kinematic boundaries.

### Claim 4 (depends on 1)

The method of claim 1, wherein the pulling down is performed by an etching process prior to the oxygen anneal process.

### Claim 5 (depends on 4)

The method of claim 4, further comprising fabricating an upper portion of the sidewall spacer on the gate stack after the oxygen anneal process, by depositing spacer material on sidewalls of the gate stack.

### Claim 6 (depends on 1)

The method of claim 1, wherein the high-k dielectric material is one of HfO2 or ZrO2.

### Claim 7 (depends on 1)

The method of claim 1, wherein the oxygen anneal process fills in oxygen vacancies in the high-k dielectric material, resulting in threshold voltage shift of the FinFET structure.

### Claim 8 (depends on 1)

The method of claim 1, wherein the oxygen anneal process is self-limiting and avoids introduction of extra variability.
