# US 8,772,139 B2 · Method of manufacturing semiconductor device

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- Number: US 8,772,139 B2
- Document ID: US8772139B2
- Status: Granted
- Kind: B2
- Application number: 13/577,836
- Filed: 2011-12-07
- Published: 2012-12-06
- Granted: 2014-07-08
- Earliest claimed: 2011-01-06
- Assignees: Sumitomo Electric Industries, Ltd.
- Applicants: Toru Hiyoshi; Takeyoshi Masuda
- Inventors: Toru Hiyoshi; Takeyoshi Masuda
- Web page: https://patentgrep.com/patent/US8772139B2

## CPC

- H10D 30/66: Vertical DMOS [VDMOS] FETs
- H10D 12/031: {of IGBTs}
- H10D 62/8325: {Silicon carbide}
- H10P 50/00: Etching of wafers, substrates or parts of devices
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a MOSFET includes the steps of preparing a silicon carbide substrate, forming an active layer on the silicon carbide substrate, forming a gate oxide film on the active layer, forming a gate electrode on the gate oxide film, forming a source contact electrode on the active layer, and forming a source interconnection on the source contact electrode. The step of forming the source interconnection includes the steps of forming a conductor film on the source contact electrode and processing the conductor film by etching the conductor film with reactive ion etching. Then, the method of manufacturing a MOSFET further includes the step of performing annealing of heating the silicon carbide substrate to a temperature not lower than 50° C. after the step of processing the conductor film.

## Claims

### Claim 1

A method of manufacturing a semiconductor device, comprising the steps of:
preparing a substrate composed of silicon carbide;
forming an active layer on said substrate;
forming a gate insulating film on said active layer;
forming a gate electrode on said gate insulating film;
forming a contact electrode on said active layer, in contact with said active layer;
forming an interconnection on said contact electrode, in contact with said contact electrode,
said step of forming an interconnection including the steps of
forming a conductor film on said contact electrode, and
processing said conductor film by etching said conductor film with reactive ion etching;
forming a passivation film to cover said conductor film; and
performing annealing or heating said substrate to a temperature not lower than 50° C. to lower a leakage current after the step of processing said conductor film, wherein said step of annealing or heating said substrate is performed after said step of forming said passivation film.

### Claim 2 (depends on 1)

The method of manufacturing a semiconductor device according to claim 1, wherein
in said step of performing annealing, said substrate is heated to a temperature not higher than 400° C.

### Claim 3 (depends on 1)

The method of manufacturing a semiconductor device according to claim 1, wherein
reactive ion etching is not performed after said step of performing annealing.

### Claim 4 (depends on 1)

The method of manufacturing a semiconductor device according to claim 1, wherein
said annealing is performed in an inert gas.