# US 8,772,132 B2 · Method of manufacturing laminated wafer by high temperature laminating method

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- Number: US 8,772,132 B2
- Document ID: US8772132B2
- Status: Granted
- Kind: B2
- Application number: 13/930,705
- Filed: 2013-06-28
- Published: 2013-10-31
- Granted: 2014-07-08
- Earliest claimed: 2009-01-15
- Assignees: Shin-Etsu Chemical Co., Ltd.
- Applicants: Shin-Etsu Chemical Co., Ltd.
- Inventors: Shoji Akiyama; Yoshihiro Kubota; Atsuo Ito; Makoto Kawai; Kouichi Tanaka; Yuji Tobisaka; Yoshihiro Nojima
- Web page: https://patentgrep.com/patent/US8772132B2

## CPC

- H10D 86/01: Manufacture or treatment
- H10P 90/1916: {with separation or delamination along an ion implanted layer, e.g. Smart-cut}
- H10P 90/1922: {using silicon etch back techniques, e.g. BESOI or ELTRAN}
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a laminated wafer is provided by forming a silicon film layer on a surface of an insulating substrate comprising the steps in the following order of: applying a surface activation treatment to both a surface of a silicon wafer or a silicon wafer to which an oxide film is layered and a surface of the insulating substrate followed by laminating in an atmosphere of temperature exceeding 50° C. and lower than 300° C., applying a heat treatment to a laminated wafer at a temperature of 200° C. to 350° C., and thinning the silicon wafer by a combination of grinding, etching and polishing to form a silicon film layer.

## Claims

### Claim 1

A method of manufacturing a laminated wafer by forming a silicon film on a surface of a transparent insulating substrate, the method comprising the steps in the following order of:
implanting ions from a surface of a silicon wafer or a silicon wafer covered with an oxide film to form an ion implantation interface;
applying a surface activation treatment to the surface of the insulating substrate and/of to the surface of the silicon wafer or the silicon wafer covered with the oxide film to which the ions have been implanted;
bonding the surface, to which the ions have been implanted, of the silicon wafer or the silicon wafer covered with the oxide film and the surface of the insulating substrate in an atmosphere of temperature exceeding 50° C. and lower than 300° C.;
applying a heat treatment at 200° C. to 350° C.; and
applying a mechanical impact to the ion implantation interface so that a silicon film is transferred to form the silicon film layer on the insulating substrate
wherein the insulating substrate is selected from quartz wafer, sapphire wafer, alumina wafer or glass wafer.

### Claim 2 (depends on 1)

The method of manufacturing a laminated wafer according to claim 1, wherein the step of bonding comprises heating, with hot plate apparatus, both of said surface of the insulating substrate and said surface of the silicon wafer or heating only said surface of the insulating substrate.

### Claim 3 (depends on 1)

The method of manufacturing a laminated wafer according to claim 1, wherein an etching solution used in the step of thinning comprises a solution of one ore more alkalis selected from a group consisting of KOH, NH3, NaOH, CsOH and NH4OH.

### Claim 4 (depends on 1)

The method of manufacturing a laminated wafer according to claim 1, wherein an etching solution used in the step of thinning comprises at least one organic solvent selected from a group consisting of ethylenediamine pyrocatechol water, tetramethylammonium hydroxide, and hydrazine.

### Claim 5 (depends on 1)

The method of manufacturing a laminated wafer according to claim 1, wherein a dose amount of hydrogen ions (H+) implanted to the silicon wafer is from 3.0×1016/cm2 to 1.0×1017/cm2 or a dose amount of hydrogen molecule ions (H2+) implanted to the silicon wafer is from 1.5×1016/cm2 to 5.0×1016/cm2.

### Claim 6 (depends on 1)

The method of manufacturing a laminated wafer according to claim 1, wherein the root-mean-square roughness of the surface of the silicon wafer and/or the surface of the insulating substrate before the surfaces are bonded is not more than 0.5 nm.

### Claim 7 (depends on 1)

A wafer obtained by the method of manufacturing a laminated wafer according to claim 1.

### Claim 8 (depends on 6)

A wafer obtained by the method of manufacturing a laminated wafer according to claim 6.