# US 8,772,126 B2 · Method of manufacturing a semiconductor device including grinding from a back surface and semiconductor device

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- Number: US 8,772,126 B2
- Document ID: US8772126B2
- Status: Granted
- Kind: B2
- Application number: 13/571,769
- Filed: 2012-08-10
- Published: 2014-02-13
- Granted: 2014-07-08
- Earliest claimed: 2012-08-10
- Assignees: Infineon Technologies AG
- Applicants: Hans-Joachim Schulze; Anton Mauder
- Inventors: Hans-Joachim Schulze; Anton Mauder
- Web page: https://patentgrep.com/patent/US8772126B2

## CPC

- H10D 62/10: Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- B24B 7/228: {for grinding thin, brittle parts, e.g. semiconductors, wafers (grinding edges of thin, brittle parts B24B9/065)}
- B24B 37/013: Devices or means for detecting lapping completion
- B24B 37/042: {operating processes therefor}
- H10D 12/032: {of vertical IGBTs}
- H10P 50/00: Etching of wafers, substrates or parts of devices
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P 52/402: {of semiconductor materials}
- H10P 54/00: Cutting or separating of wafers, substrates or parts of devices
- H10P 74/238: {comprising acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection or in-situ thickness measurement}
- H10P 95/906: {for altering the shape of semiconductors, e.g. smoothing the surface}
- H10W 10/021: {of air gaps}
- H10W 10/20: Air gaps
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- B24B: MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING (grinding of gear teeth B23F, of screw-threads B23G1/36; by electro-erosion B23H; abrasive or related blasting B24C; tools for grinding, buffing or sharpening B24D; polishing compositions C09G1/00; abrasives C09K3/14; electrolytic etching or polishing C25F3/00; grinding arrangements for use on assembled railway tracks E01B31/17); DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A cavity is etched from a front surface into a semiconductor substrate. After providing an etch stop structure at the bottom of the cavity, the cavity is closed. From a back surface opposite to the front surface the semiconductor substrate is grinded at least up to an edge of the etch stop structure oriented to the back surface. Providing the etch stop structure at the bottom of an etched cavity allows for precisely adjusting a thickness of a semiconductor body of a semiconductor device.

## Claims

### Claim 1

A method of manufacturing a semiconductor device, the method comprising
etching a cavity from a front surface into a semiconductor substrate;
providing an etch stop structure from at least one of silicon oxide, silicon nitride and silicon oxynitride at the bottom of the cavity;
closing the cavity;
grinding the semiconductor substrate from a back surface opposite to the front surface at least up to an edge of the etch stop structure oriented toward the back surface;
monitoring, during grinding, a grind stop signal indicating exposure of the etch stop structure; and
stopping or controlling the grinding in response to detection of the grind stop signal; wherein providing the etch stop structure comprises providing an etch resistive material at the
bottom of the cavity, the etch resistive material being absent in a portion of the cavity above the etch stop structure; and
wherein closing the cavity comprises tempering, after providing the etch stop structures, the semiconductor substrate in a hydrogen containing ambient to control a collapse of the cavity above the etch stop structure and to form a contiguous layer of a semiconductor material forming the semiconductor substrate above the collapsed cavity, the etch stop structure forming a buried etch stop island.

### Claim 2 (depends on 1)

The method according to claim 1, wherein
the cavity is closed in a portion adjoining the front surface.

### Claim 3 (depends on 2)

The method according to claim 2, wherein
a void is left in a portion of the cavity.

### Claim 4 (depends on 1)

The method according to claim 1, wherein
the cavity widens with increasing distance from the front surface.

### Claim 5 (depends on 4)

The method according to claim 4, wherein
providing the etch stop structure and closing the cavity comprise providing an etch stop layer lining an inner surface of the cavity, the etch stop layer closing the cavity at the front surface and leaving a void in the cavity.

### Claim 6 (depends on 4)

The method according to claim 4, wherein
the cavity forms a circumferential trench surrounding a mesa portion of the semiconductor device at a distance to an outer surface of a semiconductor body of the semiconductor device, and further comprising
forming semiconductor elements in the mesa portion.

### Claim 7 (depends on 4)

The method according to claim 4, wherein
providing the etch stop layer comprises annealing a semiconductor material of the semiconductor substrate in an oxygen containing ambient to convert a portion of the semiconductor material into a semiconductor oxide forming at least a portion of the etch stop layer.

### Claim 8 (depends on 7)

The method according to claim 7, wherein
a plurality of the cavities is etched along a circumferential line surrounding a mesa portion of a semiconductor body of the semiconductor device at a distance to an outer surface of the semiconductor body, neighboring cavities being separated by fins of the semiconductor material, the fins being converted to semiconductor oxide during the tempering in the oxygen containing ambient.

### Claim 9 (depends on 1)

The method according to claim 1, wherein
the cavity forms a grid in the semiconductor substrate, and the method further comprises
forming semiconductor elements in meshes of the grid; and
singularizing a semiconductor die of the semiconductor device from the semiconductor substrate along a parting line through the cavity.

### Claim 10 (depends on 1)

The method according to claim 1, further comprising
planarizing the contiguous layer.

### Claim 11 (depends on 1)

The method according to claim 1, further comprising
forming a semiconductor element in the contiguous layer of the semiconductor material in a vertical direction above the buried etch stop island.

### Claim 12 (depends on 1)

The method according to claim 1, further comprising
removing the buried etch stop island.

### Claim 13

A method of manufacturing a semiconductor device, the method comprising
etching a cavity forming a grid from a front surface into a semiconductor substrate;
providing an etch stop structure from at least one of silicon oxide, silicon nitride and silicon oxynitride at the bottom of the cavity;
closing the cavity at least partially;
grinding the semiconductor substrate from a back surface opposite to the front surface at least up to an edge of the etch stop structure oriented to the back surface;
monitoring, during grinding, a grind stop signal indicating exposure of the etch stop structure;
stopping or controlling the grinding in response to detection of the grind stop signal; and
singularizing a semiconductor die from the semiconductor substrate along a parting line cutting through the etch stop structure;
wherein providing the etch stop structure comprises providing an etch resistive material at the bottom of the cavity, the etch resistive material being absent in a portion of the cavity above the etch stop structure; and
wherein closing the cavity comprises tempering, after providing the etch stop structures, the semiconductor substrate in a hydrogen containing ambient to control a collapse of the cavity above the etch stop structure and to form a contiguous layer of a semiconductor material forming the semiconductor substrate above the collapsed cavity, the etch stop structure forming a buried etch stop island.