# US 8,772,113 B2 · Method for manufacturing silicon carbide semiconductor device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,772,113 B2
- Document ID: US8772113B2
- Status: Granted
- Kind: B2
- Application number: 13/944,562
- Filed: 2013-07-17
- Published: 2014-02-27
- Granted: 2014-07-08
- Earliest claimed: 2012-08-23
- Assignees: Sumitomo Electric Industries, Ltd.
- Applicants: Sumitomo Electric Industries, Ltd.
- Inventors: Takeyoshi Masuda; Yu Saitoh; Kenji Hiratsuka
- Web page: https://patentgrep.com/patent/US8772113B2

## CPC

- H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)}
- H10D 12/031: {of IGBTs}
- H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 62/8325: {Silicon carbide}
- H10P 50/242: {of Group IV materials}
- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10P 70/23: {during, before or after processing of insulating materials}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A silicon carbide substrate is prepared which has a main surface covered with a silicon dioxide layer. In the silicon dioxide layer, an opening is formed by etching. In the opening, a residue resulting from the etching is on the silicon carbide substrate. The residue is removed by plasma etching in which only an inert gas is introduced. After removing the residue, under heating, a reactive gas is supplied to the silicon carbide substrate covered with the silicon dioxide layer having the opening formed therein. In this way, a trench is formed in the main surface of the silicon carbide substrate.

## Claims

### Claim 1

A method for manufacturing a silicon carbide semiconductor device, comprising the steps of:
preparing a silicon carbide substrate having a main surface covered with a silicon dioxide layer;
forming a photoresist layer having a pattern on said silicon dioxide layer;
forming an opening in said silicon dioxide layer through etching with said photoresist layer being used as a mask, so as to expose a portion of said main surface through said opening, a residue resulting from said etching being on said portion of said main surface exposed through said opening;
removing said residue by plasma etching in which only an inert gas is introduced;
after the step of removing said residue, forming a trench, which has a side wall surface, in said main surface of said silicon carbide substrate by supplying a reactive gas, under heating, to said silicon carbide substrate having said main surface covered with said silicon dioxide layer having said opening formed therein;
forming a gate insulating film on said side wall surface of said trench; and
forming a gate electrode on said gate insulating film.

### Claim 2 (depends on 1)

The method for manufacturing the silicon carbide semiconductor device according to claim 1, wherein said plasma etching is performed under an atmosphere having a remaining oxygen content of 1% or less.

### Claim 3 (depends on 1)

The method for manufacturing the silicon carbide semiconductor device according to claim 1, wherein said reactive gas contains a halogen gas.

### Claim 4 (depends on 3)

The method for manufacturing the silicon carbide semiconductor device according to claim 3, wherein said reactive gas contains oxygen gas.

### Claim 5 (depends on 1)

The method for manufacturing the silicon carbide semiconductor device according to claim 1, wherein a number density of projections each having a height of 10 nm or more is 1 cm−2 or less on said main surface having said trench formed therein.
