# US 8,772,091 B2 · Methods for protecting electronic circuits operating under high stress conditions

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- Number: US 8,772,091 B2
- Document ID: US8772091B2
- Status: Granted
- Kind: B2
- Application number: 13/966,938
- Filed: 2013-08-14
- Published: 2013-12-12
- Granted: 2014-07-08
- Earliest claimed: 2011-02-11
- Assignees: Analog Devices, Inc.
- Applicants: Analog Devices, Inc.
- Inventors: Javier A Salcedo; David Hall Whitney
- Web page: https://patentgrep.com/patent/US8772091B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 84/0112: {Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs}
- H10D 89/713: {including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Apparatus and methods for electronic circuit protection under high stress operating conditions are provided. In one embodiment, an apparatus includes a substrate having a first p-well, a second p-well adjacent the first p-well, and an n-type region separating the first and second p-wells. An n-type active area is over the first p-well and a p-type active area is over the second p-well. The n-type and p-type active areas are electrically connected to a cathode and anode of a high reverse blocking voltage (HRBV) device, respectively. The n-type active area, the first p-well and the n-type region operate as an NPN bipolar transistor and the second p-well, the n-type region, and the first p-well operate as a PNP bipolar transistor. The NPN bipolar transistor defines a relatively low forward trigger voltage of the HRBV device and the PNP bipolar transistor defines a relatively high reverse breakdown voltage of the HRBV device.

## Claims

### Claim 1

A method of fabricating an electronic protection circuit, the method comprising:
forming a first high reverse breakdown voltage (HRBV) device, wherein forming the first HRBV device comprises:
forming a first p-well and a second p-well in a substrate, wherein the first and second p-wells are separated by an n-type region;
forming a first n-type active area in the first p-well;
forming a first p-type active area in the second p-well;
configuring the first n-type active area, the first p-well, and the n-type region to operate as an emitter, a base, and a collector of an NPN bipolar transistor, respectively;
wherein the NPN bipolar transistor is configured to control a forward trigger voltage of the first HRBV device;
configuring the second p-well, the n-type region, and the first p-well to operate as an emitter, a base, and a collector of a PNP bipolar transistor, respectively; and
wherein the PNP bipolar transistor is configured to control a reverse breakdown voltage of the first HRBV device,
foaming a first protection circuit comprising the first HRBV device to provide protection between a first pad and a second pad, wherein forming the first protection circuit comprises:
configuring the first protection circuit to activate when a transient electrical event received between the first and second pads has a first voltage polarity; and
configuring the first HRBV device to prevent the first protection circuit from activating when the transient electrical event has a second voltage polarity opposite the first voltage polarity.

### Claim 2 (depends on 1)

The method of claim 1 further comprising:
forming a second protection circuit to provide protection against the transient electrical event received between the first and second pads;
configuring the first protection circuit to define a protection response against the transient electrical event independent from the second protection circuit when the transient electrical event has the first voltage polarity; and
configuring the second protection circuit to define a protection response against the transient electrical event independent from the first protection circuit when the transient electrical event has the second voltage polarity.

### Claim 3 (depends on 2)

The method of claim 2, further comprising forming an output driver circuit, and protecting the output of the output driver circuit from a short to a battery voltage using the first and second protection circuits.

### Claim 4 (depends on 2)

The method of claim 2, further comprising forming an input driver circuit, and protecting the input of the input driver circuit from a short to a battery voltage using the first and second protection circuits.

### Claim 5 (depends on 2)

The method of claim 2, wherein forming the second protection circuit further comprises forming a second HRBV device.

### Claim 6 (depends on 2)

The method of claim 2, wherein forming the second protection circuit further comprises forming a silicon controlled rectifier (SCR).

### Claim 7 (depends on 2)

The method of claim 2, wherein the first voltage polarity is positive and the second voltage polarity is negative, the method further comprising forming the first protection circuit such that the first protection circuit triggers in the range of about 25 V to about 30 V and forming the second protection circuit such that the second protection circuit triggers in the range of about −12 V to about −15 V.

### Claim 8 (depends on 2)

The method of claim 2, wherein the first voltage polarity is positive and the second voltage polarity is negative, the method further comprising forming a plurality of devices of a first cascade of protection devices of the first protection circuit such that, during operation, the plurality of devices of the first cascade are configured to independently control a forward trigger voltage, a forward holding voltage, and a forward transient current handling capability of the first protection circuit.

### Claim 9 (depends on 8)

The method of claim 8, further comprising forming a plurality of devices of a second cascade of protection devices of the second protection circuit such that, during operation, the plurality of devices of the second cascade are configured to independently define a reverse trigger voltage, a reverse holding voltage, and a reverse transient current handling capability of the second protection circuit.

### Claim 10 (depends on 8)

The method of claim 8, wherein forming the plurality of devices of the first cascade of protection devices such that the first HRBV device is cascaded with one or more PNP protection devices.

### Claim 11 (depends on 10)

The method of claim 10, wherein the one or more PNP protection devices comprises a first PNP protection device and a second PNP protection device, wherein the first HRBV device includes an anode electrically connected to the first pad and a cathode electrically connected to an emitter and a base of the first PNP protection device, and wherein the second PNP protection devices includes a collector electrically connected to the second pad and a base and an emitter electrically connected to a collector of the first PNP protection device.

### Claim 12 (depends on 11)

The method of claim 11, further comprising forming the first PNP protection device as a parasitic device of a first PMOS transistor, and forming the second PNP protection device as a parasitic device of a second PMOS transistor.

### Claim 13 (depends on 1)

The method of claim 1, wherein forming the first HRBV device further comprises forming a deep n-well beneath the first p-well, the second p-well, and the n-type region.

### Claim 14 (depends on 13)

The method of claim 13, wherein forming the first HRBV device further comprises forming an n-well laterally surrounding the first and second p-wells, and electrically isolating the first and second p-wells from the substrate using the n-well and the deep n-well.

### Claim 15 (depends on 14)

The method of claim 14, wherein forming the first HRBV device further comprises forming a p-type guard well laterally surround the n-well.

### Claim 16 (depends on 1)

The method of claim 1, wherein forming the first HRBV device further comprises forming a second p-type active area in the first p-well.

### Claim 17 (depends on 16)

The method of claim 16, wherein the second p-type active area is positioned between the n-type region and the first n-type active area, and wherein forming the first HRBV device further comprises forming a second n-type active area, wherein the second n-type active area includes a first portion disposed in the first p-well and a second portion disposed in the n-type region.

### Claim 18 (depends on 16)

The method of claim 16, wherein forming the first HRBV device further comprises a third p-type active area, wherein the third p-type active area includes a first portion disposed in the first p-well and a second portion disposed in the n-type region, wherein the first n-type active area is positioned between the second and third p-type active areas.

### Claim 19

A method of fabricating an electronic protection circuit, the method comprising:
forming a first high reverse breakdown voltage (HRBV) device, wherein forming the first HRBV device comprises:
forming a first well and a second well in a substrate, wherein the first and second wells have a first doping type, and wherein the first and second wells are separated by a doped region of a second doping type;
forming a first active area in the first well, the first active area having a doping of the second type;
forming a second active area in the second well, the second active area having a doping of the first type;
configuring the first active area, the first well, and the doped region are configured to operate as an emitter, a base, and a collector of a first bipolar transistor, respectively;
wherein the first bipolar transistor is configured to control a trigger voltage of the first HRBV device;
configuring the second well, the doped region, and the first well to operate as an emitter, a base, and a collector of a second bipolar transistor, respectively; and
wherein the second bipolar transistor is configured to control a breakdown voltage of the first HRBV device,
forming a first protection circuit comprising the first HRBV device to provide protection between a first pad and a second pad, wherein forming the first protection circuit comprises:
configuring the first protection circuit to activate when a transient electrical event received between the first and second pads has a first voltage polarity; and
configuring the first HRBV device to prevent the first protection circuit from activating when the transient electrical event has a second voltage polarity opposite the first voltage polarity.

### Claim 20 (depends on 19)

The method of claim 19 further comprising:
forming a second protection circuit to provide protection against the transient electrical event received between the first and second pads;
configuring the first protection circuit to define a protection response against the transient electrical event independent from the second protection circuit when the transient electrical event has the first voltage polarity; and
configuring the second protection circuit to define a protection response against the transient electrical event independent from the first protection circuit when the transient electrical event has the second voltage polarity.