# US 8,772,083 B2 · Solder mask with anchor structures

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- Number: US 8,772,083 B2
- Document ID: US8772083B2
- Status: Granted
- Kind: B2
- Application number: 13/229,687
- Filed: 2011-09-10
- Published: 2013-03-14
- Granted: 2014-07-08
- Earliest claimed: 2011-09-10
- Assignees: ATI Technologies ULC; Advanced Micro Devices, Inc.
- Applicants: Andrew K W Leung; Roden R. Topacio; Yu-Ling Hsieh; Yip Seng Low
- Inventors: Andrew K W Leung; Roden R. Topacio; Yu-Ling Hsieh; Yip Seng Low
- Web page: https://patentgrep.com/patent/US8772083B2

## CPC

- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 70/6525: {for securing the interconnections to the substrate, e.g. to prevent peeling}
- H10W 70/687: {characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage}
- H10W 70/69: Insulating materials thereof
- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 74/127: {characterised by arrangements for sealing or adhesion}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 72/072: {of bump connectors}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/354: {comprising polymers}
- H10W 72/931: {Shapes of bond pads}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

Various substrates or circuit boards for receiving a semiconductor chip and methods of processing the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in a solder mask positioned on a side of a substrate. The first opening does not extend to the side. A second opening is formed in the solder mask that extends to the side. The first opening may serve as an underfill anchor site.

## Claims

### Claim 1

A method of manufacturing, comprising:
forming a first opening in a solder mask positioned on a side of a circuit board, the first opening not extending to the side, the solder mask including a photoactive compound;
forming a second opening in the solder mask that extends to the side; and
whereby the first and second openings being formed by lithographically patterning including masking first and second portions of the solder mask, exposing the solder mask with a first light dosage to leave the first and second portions uncured, masking the second portion but not the first portion of the solder mask, exposing the first portion of the solder mask with a second light dosage smaller than the first light dosage to leave a region of the first portion proximate the side uncured, and developing the solder mask to form the first and second openings.

### Claim 2 (depends on 1)

The method of claim 1, wherein the side includes a conductor, the second opening exposing at least a portion of the conductor.

### Claim 3 (depends on 1)

The method of claim 1, comprising placing an underfill on the solder mask so that a portion thereof projects into the first opening.

### Claim 4 (depends on 1)

The method of claim 1, comprising forming the first and second openings with a tapered sidewall.

### Claim 5 (depends on 1)

The method claim 1, wherein the first and second openings are formed using instructions stored in a computer readable medium.

### Claim 6 (depends on 1)

The method of claim 1, comprising coupling a semiconductor chip to the circuit board.

### Claim 7 (depends on 6)

The method of claim 6, wherein the circuit board comprises a chip package substrate.

### Claim 8

A method of manufacturing, comprising:
coupling a semiconductor chip to a side of a circuit board, the side including a solder mask having photoactive compound, a first opening not extending to the side and a second opening extending to the side, the first and second openings being photolithographically patterned by masking first and second portions of the solder mask, exposing the solder mask with a first light dosage to leave the first and second portions uncured, masking the second portion but not the first portion of the solder mask, exposing the first portion of the solder mask with a second light dosage smaller than the first light dosage to leave a region of the first portion proximate the side uncured, and developing the solder mask to form the first and second openings; and
placing an underfill between the semiconductor chip and the solder mask, a portion of the underfill projecting into the first opening.

### Claim 9 (depends on 8)

The method of claim 8, wherein the circuit board comprises a chip package substrate.

### Claim 10

A method of manufacturing, comprising:
forming a first opening in a solder mask positioned on a side of a circuit board, the first opening not extending to the side, the solder mask including a photoactive compound;
forming a second opening in the solder mask that extends to the side; and
wherein the forming of the first and second openings includes photolithographically patterning the first and second openings by masking first and second portions of the solder mask, exposing the solder mask with a first light dosage to leave the first and second portions uncured, masking the second portion but not the first portion of the solder mask, exposing the first portion of the solder mask with a second light dosage smaller than the first light dosage to leave a region of the first portion proximate the side uncured, and developing the solder mask to form the first and second openings.

### Claim 11

A method of manufacturing, comprising:
forming a first opening in a solder mask positioned on a side of a circuit board, the first opening not extending to the side, the solder mask including a photoactive compound;
forming a second opening in the solder mask that extends to the side; and
whereby the first and second openings being formed by photolithographically patterning, the photolithographically patterning including masking first and second portions of the solder mask with a mask comprising a first opaque structure having a first lateral dimension and a second opaque structure having a second lateral dimension, exposing the solder mask with light to cure the second portion, wherein the first lateral dimension is selected to enable the light to interact inside the solder mask to leave a region of the first portion proximate the side uncured, and developing the solder mask to form the first and second openings.

### Claim 12

A method of manufacturing, comprising:
coupling a semiconductor chip to a side of a circuit board, the side including a solder mask having a photoactive compound, a first opening not extending to the side and a second opening extending to the side, the first and second openings being photolithographically patterned by masking first and second portions of the solder mask with a mask comprising a first opaque structure having a first lateral dimension and a second opaque structure having a second lateral dimension, exposing the solder mask with light to cure the second portion, wherein the first lateral dimension is selected to enable the light to interact inside the solder mask to leave a region of the first portion proximate the side uncured, and developing the solder mask to form the first and second openings; and
placing an underfill between the semiconductor chip and the solder mask, a portion of the underfill projecting into the first opening.