Memory support provided with memory elements of ferroelectric material and non-destructive reading method thereof
AssigneeSTMicroelectronics S.r.l.
InventorsAntonio Maria Scalia, Maurizio Greco
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Abstract
A method for non-destructive reading of logic data stored in a memory includes applying to a first wordline a reading voltage so as not to cause a variation of the stable state of polarization of a layer of ferroelectric material, and generating a difference of potential between first and second bitlines. An output current is generated comparing the output current with a plurality of comparison values, and determining the logic value of the logic data to be read on the basis of the comparison.
Claims14
A method for non-destructive reading of data stored in a memory including a first wordline, a first bitline, a second bitline, and a first ferroelectric transistor, the first ferroelectric transistor having a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the first wordline, the first ferroelectric transistor comprising a layer of ferroelectric material in a stable state of polarization capable of assuming high and low logic values;
- and a second wordline and a second ferroelectric transistor, the second ferroelectric transistor having a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the second wordline, the second ferroelectric transistor comprising a layer of ferroelectric material in a stable state of polarization and capable of assuming a high logic value and a low logic value, the method comprising:
- biasing the control terminal of the first ferroelectric transistor to a first biasing value by applying to the first wordline a reading voltage so as to not cause a variation of the stable state of polarization of the layer of ferroelectric material;
- generating a sense voltage between the first and second bitlines;
- generating a current value of a current that flows between the first and second bitlines;
- comparing the current value to a plurality of comparison, values indicative of a respective number of logic data that have a high logic value or a low logic value for a column of the ferroelectric memory including the first and second ferroelectric transistors;
- and
- determining a logic value of the data based upon the comparison.
A method for non-destructive reading of data stored in a memory including a first wordline, a first bitline, a second bitline, and a first ferroelectric transistor, the first ferroelectric transistor having a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the first wordline, the first ferroelectric transistor comprising a layer of ferroelectric material in a stable state of polarization capable of assuming high and low logic values;
- and a second wordline and a second ferroelectric transistor, the second ferroelectric transistor having a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the second wordline, the second ferroelectric transistor comprising a layer of ferroelectric material in a stable state of polarization and capable of assuming a high logic value and a low logic value, the method comprising:
- biasing the control terminal of the first ferroelectric transistor to a first biasing value by applying to the first wordline a reading voltage so as to not cause a variation of the stable state of polarization of the layer of ferroelectric material;
- generating a current value of a current that flows between the first and second bitlines;
- and
- comparing the current value to a plurality of comparison values indicative of a respective number of logic data that have a high logic value or a low logic value for a column of the ferroelectric memory including the first and second ferroelectric transistors;
- and
- determining a logic value of the data based upon the comparison.
A ferroelectric memory comprising:
- a first wordline;
- a first bitline;
- a second bitline;
- a first ferroelectric transistor including a layer of ferroelectric material in a stable state of polarization and capable of assuming high and low logic values, and comprising a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the first wordline;
- a second wordline;
- a second ferroelectric transistor having a first conduction terminal coupled to the first bitline, a second conduction terminal coupled to the second bitline, and a control terminal coupled to the second wordline, and comprising a layer of ferroelectric material in a stable state of polarization and capable of assuming high and low logic values;
- a bias generator to generate a reading voltage, coupled to the first wordline, and configured for biasing, via the first wordline, the control terminal of the first ferroelectric transistor to a first biasing value so as not to cause a variation of the stable state of polarization of the layer of ferroelectric material;
- a sense generator to generate a sense voltage, and coupled between the first and second bitlines;
- a reading and comparison circuit coupled to at least one of the first bitline and the second bitline, configured to read a current value of a current that flows between the first and second bitlines, and to compare the current value to a plurality of comparison values indicative of a respective number of logic data that have a high logic value or a low logic value for a column of the ferroelectric memory including the first and second ferroelectric transistors;
- and
- control logic circuitry coupled to the reading and comparison circuit and configured to determine a logic value of the data to be read based upon the comparison.
Dependencies are inferred from the claim text.