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US 8,760,199 B2Granted
Buffer circuit
AssigneeHynix Semiconductor Inc.
InventorSang-Yeon Byeon
Life of this patent
Estimating the term…
Abstract
A buffer circuit includes an amplification unit configured to amplify and output a difference between an input signal and a reference voltage; and a driver configured to drive an output node in response to the output of the amplification unit and be controlled in at least one of a pull-up driving strength and a pull-down driving strength at the output node in response to the reference voltage.
Claims11
A buffer circuit comprising:
- an amplification unit configured to amplify a difference between an input signal and a reference voltage and output the amplified difference as an output of the amplification unit;
- and
- a driver configured to drive an output node in response to the output of the amplification unit and be controlled in at least one of a pull-up driving strength and a pull-down driving strength at the output node in response to the reference voltage,
- wherein the amplification unit and the driver are configured so that as the reference voltage becomes higher, a high pulse width of the output of the amplification unit tends to become shorter, a period of pull-down driving by the driver tends to become shorter, and the pull-down driving strength of the driver tends to become stronger so as to offset effects at the output node of the shorter period of pull-down driving by the driver.
1 more element
Dependencies are inferred from the claim text.