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US 8,753,942 B2Granted
Silicon and silicon germanium nanowire structures
AssigneeIntel Corporation
InventorsKelin J. Kuhn, Seiyon Kim, Rafael Rios, Stephen M. Cea, Martin D. Giles, Annalisa Cappellani, Titash Rakshit, Peter Chang, Willy Rachmady
Life of this patent
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Abstract
Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.
Claims30
A method of forming a device comprising:
- forming epitaxial silicon germanium on a substrate;
- forming epitaxial silicon on the epitaxial silicon germanium;
- patterning the epitaxial silicon disposed on the epitaxial silicon germanium to form fin structures;
- forming a sacrificial gate electrode over said fin structures;
- forming spacers adjacent to sidewalls of the sacrificial gate electrode and over the fin structures;
- removing a semiconductor portion of the fin structures from source/drain regions on the substrate, then forming source/drain structures on the source/drain regions, wherein the source/drain regions are adjacent the spacers;
- removing said sacrificial gate electrode from between the spacers;
- and
- removing one of the silicon and the epitaxial silicon germanium layers from the fin structures disposed between the spacers.
6 more elements
A method of forming a nanowire device comprising:
- forming alternating layers of epitaxial silicon on epitaxial silicon germanium on a substrate;
- patterning the alternating layers to form fin structures;
- forming a sacrificial gate electrode over said fin structures;
- forming spacers adjacent to sidewalls of the sacrificial gate electrode and over said fin structures;
- removing a semiconductor portion of the fin structures from source/drain regions on the substrate, then forming source/drain structures on the source/drain regions, wherein the source/drain regions are adjacent the spacers;
- after removing the semiconductor portion of the fin structures from the source/drain regions, removing said sacrificial gate electrode from between the spacers;
- and
- removing one of the silicon and the epitaxial silicon germanium layers from the fin structures disposed between the spacers.
5 more elements
A method of forming a device comprising:
- forming a sacrificial material on a substrate;
- forming an epitaxial semiconductor on the sacrificial material;
- patterning the epitaxial semiconductor disposed on the sacrificial material to form a fin structure;
- forming a sacrificial gate electrode over the fin structure;
- forming spacers adjacent to sidewalls of the sacrificial gate electrode and over the fin structure;
- removing a semiconductor portion of the fin structure from source/drain regions on the substrate, then forming source/drain structures on the source/drain regions wherein the source/drain regions are adjacent to the spacers;
- removing the sacrificial gate electrode from between the spacers;
- and
- removing the sacrificial material from the fin structure disposed between the spacers.
6 more elements
Dependencies are inferred from the claim text.