# US 8,751,996 B1 · Automatically routing nets according to parasitic constraint rules

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- Number: US 8,751,996 B1
- Document ID: US8751996B1
- Status: Granted
- Kind: B1
- Application number: 13/711,535
- Filed: 2012-12-11
- Granted: 2014-06-10
- Earliest claimed: 2005-11-08
- Assignees: Pulsic Limited
- Applicants: Pulsic Limited
- Inventors: Jeremy Birch; Mark Waller; Mark Williams; Graham Balsdon; Fumiaki Sato; Tim Parker
- Web page: https://patentgrep.com/patent/US8751996B1

## CPC

- G06F 30/394: Routing (G06F30/396 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A system of automatically routing interconnect of a integrated circuit design while taking into consideration the parasitic issues of the wiring as it is created. The system will be able to select an appropriate wiring pattern so that signals meet their performance requirements.

## Claims

### Claim 1

A method comprising:
providing an integrated circuit design having a plurality of source cells and sink cells to be routed using a plurality of nets;
identifying a source cell and sink cell pair of the plurality as a critical signal path having a timing constraint; and
using at least one electronic processor, automatically routing nets between the source cells and the sink cells, wherein parasitics of the integrated circuit design are taken into consideration during routing of a critical signal path net, the automatically routing nets comprises:
estimating parasitics for a course of the critical signal path net;
after estimating parasitics, generating a first segment of the critical signal path net; and
using the estimated parasitics, determining a second segment of the critical signal path net.

### Claim 2 (depends on 1)

The method of claim 1 further comprising extending a length of at least one segment of the critical signal path net in order to reduce a timing delay of the critical signal path.

### Claim 3 (depends on 1)

The method of claim 1 further comprising widening at least one segment of the critical signal path net in order to reduce a timing delay of the critical signal path net.

### Claim 4 (depends on 1)

The method of claim 1 further comprising increasing a spacing between a segment of the critical signal path net and an adjacent net.

### Claim 5 (depends on 1)

The method of claim 1 comprising:
providing a constraint rule for the critical signal path net;
evaluating whether the critical signal path net satisfies the constraint rule; and
if the constraint rule is not satisfied, altering the routing of the critical signal path net comprising increasing spacing between the critical signal path net and an adjacent net.

### Claim 6 (depends on 5)

The method of claim 5 wherein the constraint rule comprises a timing constraint.

### Claim 7 (depends on 1)

The method of claim 1 wherein the estimating parasitics for a course of the critical signal path net comprises dividing the layout into a lattice of bins.

### Claim 8 (depends on 7)

The method of claim 7 wherein the estimating parasitics for a course of the critical signal path net comprises estimating parasitics for each bin.

### Claim 9 (depends on 7)

The method of claim 7 further comprising determining sensitivity values for each bin.

### Claim 10 (depends on 7)

The method of claim 7 wherein the bins are variably sized.

### Claim 11 (depends on 1)

The method of claim 1 wherein the parasitics comprise resistance and capacitance values.

### Claim 12 (depends on 1)

The method of claim 1 wherein the estimating parasitics for a course of the critical signal path net comprises dividing the course into a plurality of bins and determining parasitic values for the bins.

### Claim 13 (depends on 1)

The method of claim 1 wherein the determining a second segment of the net occurs after generating a first segment of the net.

### Claim 14 (depends on 1)

The method of claim 1 wherein the determining a second segment of the critical signal path net comprises generating a flood.

### Claim 15

A method comprising:
providing an integrated circuit design having a plurality of source cells and sink cells to be routed using a plurality of nets;
identifying a source cell and sink cell pair of the plurality as a critical signal path having a timing constraint; and
using at least one electronic processor, automatically routing nets between the source cell and the sink cell pair comprising:
estimating parasitics for a course of a critical signal path net, wherein the parasitics comprises resistance and capacitance values;
after estimating parasitics, generating a first segment of the critical signal path net; and
using the estimated parasitics, determining a second segment of the critical signal path net.

### Claim 16 (depends on 15)

The method of claim 15 wherein the estimating parasitics for a course of the critical signal path net comprises dividing the layout into a lattice of bins.

### Claim 17 (depends on 16)

The method of claim 16 wherein the estimating parasitics for a course of the critical signal path net comprises estimating parasitics for each bin.

### Claim 18 (depends on 16)

The method of claim 16 further comprising determining sensitivity values for each bin.

### Claim 19 (depends on 16)

The method of claim 16 wherein the bins are variably sized.

### Claim 20

A method comprising:
providing an integrated circuit design having a plurality of source cells and sink cells to be routed using a plurality of nets;
identifying a source cell and sink cell pair of the plurality as a critical signal path having a timing constraint; and
using at least one electronic processor, automatically routing nets between the source cell and the sink cell pair comprising:
estimating parasitics for a course of a critical signal path net, wherein the parasitics comprise resistance and capacitance values;
dividing the layout into bins;
estimating parasitics for each bin;
after estimating parasitics, generating a first segment of the critical signal path net;
using the estimated parasitics, determining a second segment of the critical signal path net;
providing a timing constraint rule for the critical signal path net;
evaluating whether the critical signal path net satisfies the timing constraint rule; and
if the timing constraint rule is not satisfied, altering the routing of the critical signal path net.