# US 8,751,898 B2 · Utilizing error correcting code data associated with a region of memory > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,751,898 B2 - Document ID: US8751898B2 - Status: Granted - Kind: B2 - Application number: 13/534,053 - Filed: 2012-06-27 - Published: 2014-01-02 - Granted: 2014-06-10 - Earliest claimed: 2012-06-27 - Assignees: International Business Machines Corporation - Applicants: Anthony J. Bybell - Inventors: Anthony J. Bybell - Web page: https://patentgrep.com/patent/US8751898B2 ## CPC - H03M 13/095: {Error detection codes other than CRC and single parity bit codes} - G06F 11/1012: {using codes or arrangements adapted for a specific type of error (G06F11/1048 takes precedence)} - H03M 13/05: using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits {(H03M13/2906 takes precedence)} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In a particular embodiment, a processor retrieves from memory, for each data block within the region of the memory, error correcting code (ECC) data corresponding to data stored within the data block. In one embodiment, a processor generates for each retrieved ECC data, a hash value by hashing the retrieved ECC data. In a particular embodiment, a processor combines hash values to generate a total hash value corresponding to a region of memory. In one embodiment, a processor uses a total hash value to compare a region of memory to other regions of the memory. ## Claims ### Claim 1 A method of utilizing error correcting code data associated with a region of memory, the region of memory containing a plurality of data blocks, the method comprising: retrieving from the memory, by a processor, for each data block within the region of the memory, error correcting code (ECC) data corresponding to data stored within the data block; generating, by the processor, for each retrieved ECC data, a hash value by hashing the retrieved ECC data; and combining, by the processor, the hash values to generate a total hash value corresponding to the region of the memory. ### Claim 2 (depends on 1) The method of claim 1 further comprising using, by the processor, the total hash value to compare the region of the memory to other regions of the memory. ### Claim 3 (depends on 1) The method of claim 1 further comprising retrieving from the memory, by the processor, for each data block within the region of the memory, the data stored within the data block. ### Claim 4 (depends on 3) The method of claim 3, wherein generating for each retrieved ECC data, a hash value by hashing the ECC data includes: combining the retrieved ECC data with the retrieved data; and hashing the combination of the retrieved ECC data and the retrieved data. ### Claim 5 (depends on 4) The method of claim 4, wherein generating for each retrieved ECC data, a hash value by hashing the ECC data includes rotating the retrieved data by a shift count, wherein each data block has a different corresponding shift count. ### Claim 6 (depends on 3) The method of claim 3, wherein each data block includes a plurality of micro-data blocks, each micro-data block containing stored data. ### Claim 7 (depends on 6) The method of claim 6, wherein retrieving for each data block within the region of the memory, the data stored within the data block includes: retrieving for each micro-data block within the data block, the data stored within the micro-data block; and generating the received data corresponding to the data block by combining the stored data retrieved from the micro-data blocks. ### Claim 8 (depends on 1) The method of claim 1, wherein retrieving from the memory, for each data block within the region of memory, ECC data corresponding to the data stored within the data block includes executing, by the processor, an ECC load instruction. ### Claim 9 (depends on 1) The method of claim 1, wherein each data block is an individual cache line within the memory. ### Claim 10 (depends on 1) The method of claim 1, wherein the memory is a higher level cache. ### Claim 11 An apparatus for utilizing error correcting code data associated with a region of cache memory, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that when executed by the computer processor cause the apparatus to carry out the steps of: retrieving from the memory, by a processor, for each data block within the region of the memory, error correcting code (ECC) data corresponding to data stored within the data block; generating, by the processor, for each retrieved ECC data, a hash value by hashing the retrieved ECC data; and combining, by the processor, the hash values to generate a total hash value corresponding to the region of the memory. ### Claim 12 (depends on 11) The apparatus of claim 11 further comprising computer program instructions that when executed by the computer processor cause the apparatus to carry out the steps of using, by the processor, the total hash value to compare the region of the memory to other regions of the memory. ### Claim 13 (depends on 11) The apparatus of claim 11 further comprising computer program instructions that when executed by the computer processor cause the apparatus to carry out the steps of retrieving from the memory, by the processor, for each data block within the region of the memory, the data stored within the data block. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein generating for each retrieved ECC data, a hash value by hashing the ECC data includes: combining the retrieved ECC data with the retrieved data; and hashing the combination of the retrieved ECC data and the retrieved data. ### Claim 15 (depends on 14) The apparatus of claim 14, wherein generating for each retrieved ECC data, a hash value by hashing the ECC data includes rotating the retrieved data by a shift count, wherein each data block has a different corresponding shift count. ### Claim 16 (depends on 13) The apparatus of claim 13, wherein each data block includes a plurality of micro-data blocks, each micro-data block containing stored data. ### Claim 17 (depends on 16) The apparatus of claim 16, wherein retrieving for each data block within the region of the memory, the data stored within the data block includes: retrieving for each micro-data block within the data block, the data stored within the micro-data block; and generating the received data corresponding to the data block by combining the stored data retrieved from the micro-data blocks. ### Claim 18 (depends on 11) The apparatus of claim 11, wherein retrieving from the memory, for each data block within the region of memory, ECC data corresponding to the data stored within the data block includes executing, by the processor, an ECC load instruction. ### Claim 19 (depends on 11) The apparatus of claim 11, wherein each data block is an individual cache line within the memory. ### Claim 20 (depends on 11) The apparatus of claim 11, wherein the memory is a higher level cache.