# US 8,751,864 B2 · Controlling memory redundancy in a system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,751,864 B2 - Document ID: US8751864B2 - Status: Granted - Kind: B2 - Application number: 13/848,830 - Filed: 2013-03-22 - Published: 2013-08-15 - Granted: 2014-06-10 - Earliest claimed: 2009-12-23 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Robert C. Swanson; Mahesh S. Natu; Rahul Khanna; Murugasamy K. Nachimuthu; Sarathy Jayakumar; Anil S. Keshavamurthy; Narayan Ranganathan - Web page: https://patentgrep.com/patent/US8751864B2 ## CPC - G06F 11/203: {using migration} - G06F 11/1666: {where the redundant component is memory or memory area} - G06F 11/20: using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed. ## Claims ### Claim 1 A system comprising: a first processor; a second processor; a first memory controller to couple the first processor to a first portion of a system memory formed of at least one memory module; and a second memory controller to couple the second processor to a second portion of the system memory, wherein the first memory controller is to cause a migration of information stored in the first portion of the system memory to the second portion of the system memory and update a redundant memory aperture storage of the first memory controller to indicate an amount of the information migrated from the first portion of the system memory to the second portion of the system memory, the first memory controller further to determine whether an error incurred during a memory access request of an operating system (OS)-controlled thread to the first portion of the system memory occurred in a region of the first portion of the system memory that has been migrated to the second portion of the system memory and if so forward the memory access request to the second memory controller to retry the memory access request to the second portion of the system memory, otherwise signal an uncorrectable memory error. ### Claim 2 (depends on 1) The system of claim 1, wherein the first processor is to insert an identifier for a first memory page in a list of pages to be migrated to the first portion. ### Claim 3 (depends on 2) The system of claim 2, wherein the first processor is to first remap a second memory page from the first portion to a non-mirrored memory portion of the system memory before remapping the first memory page to the first portion, wherein the second memory page is less frequently accessed than the first memory page during a first time period. ### Claim 4 (depends on 1) The system of claim 1, wherein the first processor is to trigger migration of the information responsive to a determination that an error threshold for the first portion of the system memory has been reached. ### Claim 5 (depends on 1) The system of claim 1, wherein the first processor is to perform the migration of the information in a system management mode in a time-slice manner in which slices are shared with the OS, wherein the OS-controlled thread is performed in at least one of the OS-shared slices. ### Claim 6 A method comprising: migrating information stored in a first memory node of a system to a second memory node of the system; prior to completion of migrating the information, updating a redundant memory aperture storage of a first memory controller associated with the first memory node to indicate an amount of the information migrated from the first memory node to the second memory node; and executing an operating system (OS)-controlled thread on a processor of the system prior to completion of the memory migration and determining in the first memory controller whether an error incurred during a memory access request of the OS-controlled thread to the first memory node occurred in a region of the first memory node that has been migrated to the second memory node and if so forwarding the memory access request from the first memory controller to a second memory controller associated with the second memory node to retry the memory access request to the second memory node, otherwise signaling an uncorrectable memory error. ### Claim 7 (depends on 6) The method of claim 6, further comprising triggering migration of the information responsive to a determination that an error threshold for the first memory node has been reached. ### Claim 8 (depends on 6) The method of claim 6, further comprising: performing the migration of the information in a system management mode in a time-slice manner in which slices are shared with the OS, wherein the OS-controlled thread is performed in at least one of the OS-shared slices; and updating the redundant memory aperture storage before exiting each time slice when migrating the information in the system management mode. ### Claim 9 (depends on 6) The method of claim 6, further comprising first remapping a second memory page from a mirrored memory portion of the first memory node to a non-mirrored memory portion of the first memory node before remapping a first memory page to the mirrored portion of the first memory node, wherein the second memory page is less frequently accessed than the first memory page during a first time period. ### Claim 10 (depends on 6) The method of claim 6, further comprising determining that the error occurred in the migrated region of the first memory node if an address associated with the memory access request is less than an address stored in the redundant memory aperture storage of the first memory controller. ### Claim 11 (depends on 10) The method of claim 10, further comprising sending the memory access request from a first home agent of the first memory controller to a second home agent of the second memory controller and receiving requested data in the first home agent from the second memory controller and forwarding the requested data to a requester to complete to the memory access request. ### Claim 12 (depends on 11) The method of claim 11, further comprising writing a corrected memory error to a log responsive to the memory access request completion. ### Claim 13 At least one computer readable storage medium comprising instructions that when executed enable the system to: migrate information stored in a first memory node of a system to a second memory node of the system; prior to completion of migration of the information, update a redundant memory aperture storage of a first memory controller associated with the first memory node to indicate an amount of the information migrated from the first memory node to the second memory node; and execute an operating system (OS)-controlled thread on a processor of the system and determine in the first memory controller whether an error incurred during a memory access request of the OS-controlled thread to the first memory node occurred in a region of the first memory node that has been migrated to the second memory node and if so forward the memory access request from the first memory controller to a second memory controller associated with the second memory node to retry the memory access request to the second memory node, otherwise signal an uncorrectable memory error. ### Claim 14 (depends on 13) The at least one computer readable storage medium of claim 13, further comprising instructions that when executed enable the system to trigger migration of the information responsive to a determination that an error threshold for the first memory node has been reached. ### Claim 15 (depends on 13) The at least one computer readable storage medium of claim 13, further comprising instructions that when executed enable the system to perform the migration of the information in a system management mode in a time-slice manner in which slices are shared with the OS, wherein the OS-controlled thread is performed in at least one of the OS-shared slices and to update the redundant memory aperture storage before exiting each time slice when migrating the information in the system management mode. ### Claim 16 (depends on 13) The at least one computer readable storage medium of claim 13, further comprising instructions that when executed enable the system to first remap a second memory page from a mirrored memory portion of the first memory node to a non-mirrored memory portion of the first memory node before remapping a first memory page to the mirrored portion of the first memory node, wherein the second memory page is less frequently accessed than the first memory page during a first time period. ### Claim 17 (depends on 13) The at least one computer readable storage medium of claim 13, further comprising instructions that when executed enable the system to determine that the error occurred in the migrated region of the first memory node if an address associated with the memory access request is less than an address stored in the redundant memory aperture storage of the first memory controller. ### Claim 18 (depends on 17) The at least one computer readable storage medium of claim 17, further comprising instructions that when executed enable the system to send the memory access request from a first home agent of the first memory controller to a second home agent of the second memory controller and receive requested data in the first home agent from the second memory controller and forward the requested data to a requester to complete to the memory access request. ### Claim 19 (depends on 17) The at least one computer readable storage medium of claim 17, further comprising instructions that when executed enable the system to write a corrected memory error to a log responsive to the memory access request completion.