# US 8,751,818 B2 · Method and apparatus for a trust processor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,751,818 B2 - Document ID: US8751818B2 - Status: Granted - Kind: B2 - Application number: 12/357,245 - Filed: 2009-01-21 - Published: 2009-11-12 - Granted: 2014-06-10 - Earliest claimed: 2003-12-11 - Assignees: Intel Corporation - Applicants: Moinul H Khan; David Wheeler; John P Brizek; Anitha Kona; Mark N. Fullerton - Inventors: Moinul H Khan; David Wheeler; John P Brizek; Anitha Kona; Mark N. Fullerton - Web page: https://patentgrep.com/patent/US8751818B2 ## CPC - G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)} - G06F 21/57: Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities - G06F 21/72: in cryptographic circuits - G06F 2221/2105: Dual mode as a secondary aspect - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state. ## Claims ### Claim 1 A method comprising: receiving a primitive instruction into a cryptographic processor from an application processor through a direct memory access logic, wherein the cryptographic processor, the application processor, and the direct memory access logic are within a system-on-a chip within a wireless device; retrieving at least one microcode instruction from a nonvolatile memory within the cryptographic processor based on the primitive instruction; determining whether one of the at least one microcode instruction is related to a sensitive operation; determining whether the cryptographic processor is in a trusted state based on whether the cryptographic processor is properly initialized; executing the at least one microcode instruction when the microcode instruction is not related to a sensitive operation or when the at least one microcode instruction is related to a sensitive operation and the cryptographic processor is in a trusted state; precluding execution of the at least one microcode instruction when the microcode instruction is related to a sensitive operation and the cryptographic processor is in an untrusted state. ### Claim 2 (depends on 1) The method of claim 1, wherein executing the at least one microcode instruction if the microcode instruction is not the sensitive operation comprises executing the at least one microcode instruction if the microcode instruction does not uses a root encryption key of the cryptographic processor. ### Claim 3 (depends on 1) The method of claim 1, wherein executing the at least one microcode instruction if the microcode instruction is not the sensitive operation comprises executing the at least one microcode instruction if the microcode instruction does not uses an encryption key protected within the cryptographic processor. ### Claim 4 (depends on 1) The method of claim 1, wherein executing the at least one microcode instruction if the microcode instruction is not the sensitive operation comprises executing the at least one microcode instruction if the microcode instruction does not access a monotonic counter or data in a platform configuration register. ### Claim 5 (depends on 1) The method of claim 1 further comprising initializing the cryptographic processor prior to receiving the primitive instruction, wherein initializing comprises verifying at least one functional unit in the cryptographic processor is generating proper results. ### Claim 6 (depends on 5) The method of claim 5, Wherein verifying the at least one functional unit in the cryptographic processor is generating proper results comprises verifying a hash unit in the cryptographic processor is generating correct hashes. ### Claim 7 (depends on 5) The method of claim 5, wherein verifying the at least one functional unit in the cryptographic processor is generating proper results comprises verifying a random number generator unit is generating random numbers. ### Claim 8 (depends on 5) The method of claim 5, wherein verifying the at least one functional unit in the cryptographic processor is generating proper results comprises verifying an exponential arithmetic unit or an arithmetic logic unit is computing proper results. ### Claim 9 A non-transitory machine-readable medium that provides instructions, which when executed by a machine, cause said machine to perform operations comprising: receiving a primitive instruction into a cryptographic processor from an application processor through a direct memory access logic, wherein the cryptographic processor, the application processor, and the direct memory access logic are within a system-on-a chip; retrieving at least one microcode instruction from a memory within the cryptographic processor based on the primitive instruction; determining whether one of the at least one microcode instruction is related to a sensitive operation; determining whether the cryptographic processor is in a trusted state based on whether the cryptographic processor is properly initialized; executing the at least one microcode instruction when the at least one microcode instruction is a sensitive operation and the cryptographic processor is in a trusted state; and precluding execution of the at least one microcode instruction when the at least one microcodeinstruction is a sensitive operation and the cryptographic processor is in an untrusted state. ### Claim 10 (depends on 9) The non-transitorymachine-readable medium of claim 9, wherein executing the at least one microcode instruction if the microcode instruction is a sensitive operation comprises executing the at least one microcode instruction if the microcode instruction uses a root encryption key of the cryptographic processor. ### Claim 11 (depends on 9) The non-transitorymachine-readable medium of claim 9, wherein executing the at least one microcode instruction if the microcode instruction is a sensitive operation comprises executing the at least one microcode instruction if the microcode instruction uses a data encryption key protected within the cryptographic processor. ### Claim 12 (depends on 9) The non-transitorymachine-readable medium of claim 9 further comprising initializing the cryptographic processor prior to receiving the primitive instruction, wherein initializing comprises verifying at least one functional unit in the cryptographic processor is generating proper results.