# US 8,751,775 B2 · Non-quiescing key setting facility > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,751,775 B2 - Document ID: US8751775B2 - Status: Granted - Kind: B2 - Application number: 13/452,248 - Filed: 2012-04-20 - Published: 2012-08-09 - Granted: 2014-06-10 - Earliest claimed: 2009-12-15 - Assignees: International Business Machines Corporation - Applicants: Dan F. Greiner; Christian Jacobi; Chung-Lung K. Shum; Timothy J. Slegel - Inventors: Dan F. Greiner; Christian Jacobi; Chung-Lung K. Shum; Timothy J. Slegel - Web page: https://patentgrep.com/patent/US8751775B2 ## CPC - G06F 9/00: Arrangements for program control, e.g. control units (program control for peripheral devices G06F13/10) - G06F 9/30: Arrangements for executing machine instructions, e.g. instruction decode (for executing microinstructions G06F9/22) - G06F 9/30003: {Arrangements for executing specific machine instructions} - G06F 9/3004: {to perform operations on memory} - G06F 9/3009: {Thread control instructions} - G06F 9/3834: {Maintaining memory consistency} - G06F 9/44: Arrangements for executing specific programs - G06F 12/1475: {in a virtual system, e.g. with translation means} - G06F 9/30167: {of immediate specifier, e.g. constants} - G06F 9/30181: {Instruction operation extension or modification} - G06F 9/4418: {Suspend and resume; Hibernate and awake} - G06F 9/45533: {Hypervisors; Virtual machine monitors} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A non-quiescing key setting facility is provided that enables manipulation of storage keys to be performed without quiescing operations of other processors of a multiprocessor system. With this facility, a storage key, which is accessible by a plurality of processors of the multiprocessor system, is updated absent a quiesce of operations of the plurality of processors. Since the storage key is updated absent quiescing of other operations, the storage key may be observed by a processor as having one value at the start of an operation performed by the processor and a second value at the end of the operation. A mechanism is provided to enable the operation to continue, avoiding a fatal exception. ## Claims ### Claim 1 A method of facilitating processing in a computing environment having a plurality of processors, the method comprising: executing by a processor of the computing environment a machine instruction, the machine instruction specifying a nonquiescing control (NQ) to control whether a quiescing, operation is to be performed, a storage key, and one or more values to be used to set the storage key, the storage key being associated with a block of storage, and wherein the executing comprises: based on the NQ being a first value indicating that a quiescing operation is to be performed, performing a)-c) comprising: a) initiating quiesce of other processors of the computing environment capable of accessing said storage key during execution of the machine instruction; b) based on the other processors reaching a quiesce point, storing at least one value of the one or more values in the storage key associated with the block of main storage; and c) initiating an end to the quiesce; and based on the NQ being a second value indicating that a quiescing operation is not to be performed, storing at least one value of the one or more values in the storage key associated with the block of main storage absent quiescing other processors of the computing environment capable of accessing said storage key, the at least one value changing at least one of an access control component and a fetch protection component of the storage key. ### Claim 2 (depends on 1) The method of claim 1, further comprising determining one of a plurality of processing modes for the request, wherein the plurality of processing modes comprises quiesce and non-quiesce, and wherein the determining is based on the nonquiescing control specified in the machine instruction. ### Claim 3 (depends on 1) The method of claim 1, wherein the instruction is a Set Storage Key Extended instruction comprising a mask field, said mask field comprising the non-quiescing control , a reference bit update mask and a change bit update mask, and wherein the Set Storage Key Extended instruction comprises a first register designation designating a first register comprising the one or more values, and a second register designation designating a second register having an address of the storage key. ### Claim 4 (depends on 1) The method of claim 1, wherein the instruction comprises a Perform Frame Management Function instruction. ### Claim 5 (depends on 1) The method of claim 1, further comprising: initiating, by another processor of the plurality of processors, an operation to access the block of storage; determining, subsequent to the initiating, that the storage key for that block of storage has changed; and continuing execution of the operation, based on to the determining. ### Claim 6 (depends on 5) The method of claim 5, further comprising: obtaining permission to access the block of storage, based on the initiating; and continuing execution of the operation, subsequent to a change of the storage key, based on the permission obtained based on the initiating. ### Claim 7 (depends on 6) The method of claim 6, wherein the obtaining permission comprises: pretesting one or more storage locations to be accessed by the operation, based on the initiating, to determine whether access is permitted; and obtaining permission, based on successful pretesting, wherein permission is obtained for a range of storage locations. ### Claim 8 (depends on 5) The method of claim 5, wherein the continuing execution comprises blocking a protection exception. ### Claim 9 (depends on 8) The method of claim 8, wherein the continuing execution comprises: deciding, based on determining the storage key has changed, whether an indicator to specify continued execution, set based on modifying a selected block of storage, specifies that execution can continue despite a changed storage key; and blocking the protection exception, based on the deciding indicating execution can continue. ### Claim 10 (depends on 1) The method of claim 1, wherein based on changing the storage key, multiple different values of the storage key are observable by one or more processors. ### Claim 11 (depends on 1) The method of claim 1, wherein the machine instruction is emulated by the processor. ### Claim 12 A method of facilitating processing in a computing environment having a plurality of processors, the method comprising: executing by a processor of the computing environment a machine instruction, the machine instruction specifying an opcode to designate the machine instruction, a nonquiescing control (NQ) separate from the opcode to control whether a quiescing operation is to be performed, a storage key, and one or more values to be used to set the storage key, the storage key being associated with a block of storage, and wherein the executing comprises: based on the NQ being a first value indicating that a quiescing operation is to be performed, performing a)-c) comprising: a) initiating quiesce of other processors of the computing environment capable of accessing said storage key during execution of the machine instruction; b) based on the other processors reaching a quiesce point, storing at least one value of the one or more values in the storage key associated with the block of storage; and c) initiating an end to the quiesce; and based on the NQ being a second value indicating that a quiescing operation is not to be performed, storing at least one value of the one or more values in the storage key associated with the block of storage absent quiescing other processors of the computing environment capable of accessing said storage key, wherein the storage key is updated by the storing absent quiescing the other processors irrespective of which one or more fields of the storage key are to be updated. ### Claim 13 (depends on 12) The method of claim 12, wherein the storing the at least one value changes at least one of an access control component and a fetch protection component of the storage key. ### Claim 14 (depends on 12) The method of claim 12, wherein the instruction is a Set Storage Key Extended instruction comprising a mask field, said mask field comprising the nonquiescing control, a reference bit update mask and a change bit update mask, and wherein the Set Storage Key Extended instruction comprises a first register designation designating a first register comprising the one or more values, and a second register designation designating a second register having an address of the storage key. ### Claim 15 (depends on 12) The method of claim 12, wherein the instruction comprises a Perform Frame Management Function instruction.