# US 8,751,181 B2 · Semiconductor device having test function and test method using the same

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- Number: US 8,751,181 B2
- Document ID: US8751181B2
- Status: Granted
- Kind: B2
- Application number: 13/195,513
- Filed: 2011-08-01
- Published: 2012-02-09
- Granted: 2014-06-10
- Earliest claimed: 2010-08-04
- Assignees: SK hynix Inc.
- Applicants: Byoung Sung Yoo
- Inventors: Byoung Sung Yoo
- Web page: https://patentgrep.com/patent/US8751181B2

## CPC

- G01R 31/3187: Built-in tests
- G11C 29/021: {in voltage or current generators}
- G11C 29/1201: {comprising I/O circuitry}
- G11C 29/48: Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
- G01R 31/30: Marginal testing, e.g. by varying supply voltage (testing computers during standby operation or idle time G06F11/22)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A semiconductor device having a test function includes a program counter for storing a breaking address in a storage unit in response to control signals, increasing a count address in response to the control signals, and storing the increased count address in the storage unit; a controller for stopping the increase of the count address when the count address is identical to the breaking address and outputting a pump holding signal; an oscillator for generating a clock signal in response to an enable signal and maintaining a current cycle of the clock signal in response to the pump holding signal; and a pump unit for generating an output voltage in response to the clock signal.

## Claims

### Claim 1

A semiconductor device having a test function, comprising:
a program counter configured to store a count address in a storage unit in response to control signals, and to increase a count address in response to the control signals and store the increased count address in the storage unit;
a controller configured to stop the increase of the count address when the count address equals the breaking address and output a pump holding signal;
an oscillator configured to generate a clock signal in response to an enable signal and maintain a current cycle of the clock signal in response to the pump holding signal; and
a pump unit configured to generate an output voltage in response to the clock signal.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the controller comprises:
a breaking address combination unit configured to generate internal breaking addresses in response to a breaking signal; and
a control signal generator configured to generate the breaking enable signal and the pump holding signal in response to the internal breaking addresses.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, further comprising:
a high voltage switch configured to switch the output voltage; and
an external pad configured to make available the output voltage.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the storage unit is configured to generate a breaking signal by comparing the breaking address and the count address.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, wherein the
controller configured to generate a breaking enable signal to hold a count operation of the program counter and the pump holding signal to enable the pump circuit to maintain the current output voltage, in response to the breaking signal.

### Claim 6 (depends on 4)

The semiconductor device of claim 4, wherein the pump unit comprises
pumps for generating the output voltage in response to the clock signal, wherein the output voltage is controlled according to the cycle of the clock signal.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the pump unit maintains the current output voltage when the count address equals the breaking address.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the controller holds a pump operation of the pump unit when the count address equals the breaking address.

### Claim 9

A test method of a semiconductor device, comprising:
receiving a breaking address for a measurement section for testing;
generating an output voltage by activating a pump circuit;
generating a count address by sequentially increasing a program address through a counting operation;
comparing the breaking address and the count address and stopping the counting operation when the breaking address equals the count address; and
controlling the pump circuit so that the pump circuit uniformly generates the output voltage.

### Claim 10 (depends on 9)

The test method of claim 9, wherein the count address is generated by counting a program address.

### Claim 11 (depends on 9)

The test method of claim 9, further comprising performing the count operation when the breaking address does not equal the count address.