Multi-core processor architecture for active autostereoscopic emissive displays

A system comprising:

• at least one multi-core processor, configured to communicate with an optical display comprising a plurality of hogels, and to control the operation of the hogels, wherein
• each hogel is configured to radiate light in plurality of directions, with controllable intensities in each of the plurality of directions, and
• the multi-core processor comprises
• an on-chip memory,
• a master processor,
• a first set of cores coupled to the master processor and to the memory, and configured to receive hogel data from the memory for a first model and to generate corresponding signals for the first model, wherein the first model comprises a three-dimensional model, and
• a second set of cores coupled to the master processor and to the memory, and configured to receive hogel data from the memory for a second model and to generate corresponding signals for the second model;
• and
• an overlay module within the multi-core processor, coupled to at least one core in the first set of cores and to at least one core in the second set of cores, and configured to:
• combine signals for the first and second models into at least one combined output signal, and
• transmit the combined output signal to one or more corresponding hogels in the optical display.

A method comprising:

• receiving, at a first core within a multi-core processor, hogel data for a first set of hogels in a dynamic optical display, wherein
• each hogel among the first set of hogels comprises
• a corresponding lenslet among an array of lenslets, and
• a corresponding plurality of controllable light sources configured to emit light into the corresponding lenslet, and
• each hogel is configured to radiate light in a plurality of directions, with controllable intensities in each of the plurality of directions;
• receiving, at a second core within the multi-core processor, hogel data for a second set of hogels in the optical display;
• performing calculations within the first core for the first set of hogels;
• and
• performing calculations within the second core for the second set of hogels;
• wherein the first and second cores are responsive to commands from an on-chip master processor.

A system comprising:

• means for providing, to a first core within a multi-core processor, hogel data for a first set of hogels in a dynamic optical display, wherein
• each hogel among the first set of hogels comprises
• a corresponding lenslet among an array of lenslets, and
• a corresponding plurality of controllable light sources configured to emit light into the corresponding lenslet, and
• each hogel is configured to radiate light in a plurality of directions, with controllable intensities in each of the plurality of directions;
• means for providing, to a second core within the multi-core processor, hogel data for a second set of hogels in the dynamic optical display;
• means for performing calculations within the first core for the first set of hogels;
• and
• means for performing calculations within the second core for the second set of hogels;
• wherein the first and second cores are responsive to commands from an on-chip master processor.

A non-transitory computer-readable medium comprising:

• a computer-readable storage medium;
• and
• computer-executable instructions, encoded on the computer-readable storage medium and configured to cause one or more cores to execute acts of:
• receiving, at a first core within a multi-core processor, hogel data for a first set of hogels in a dynamic optical display, wherein
• each hogel among the first set of hogels comprises
• a corresponding lenslet among an array of lenslets, and
• a corresponding plurality of controllable light sources configured to emit light into the corresponding lenslet, and
• each hogel is configured to radiate light in a plurality of directions, with controllable intensities in each of the plurality of directions;
• receiving, at a second core within the multi-core processor, hogel data for a second set of hogels in the optical display;
• performing calculations within the first core for the first set of hogels;
• and
• performing calculations within the second core for the second set of hogels;
• wherein the first and second cores are responsive to commands from an on-chip master processor.