Three dimensional memory array architecture
AssigneeMicron Technology, Inc.
InventorFederico Pio
Life of this patent
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Abstract
Three dimensional memory array architectures and methods of forming the same are provided. An example memory array can include a stack comprising a plurality of first conductive lines at a number of levels separated from one another by at least an insulation material, and at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines. Storage element material is formed around the at least one conductive extension. Cell select material is formed around the at least one conductive extension. The at least one conductive extension, storage element material, and cell select material are located between co-planar pairs of the plurality of first conductive lines.
Claims32
A three dimensional memory array, comprising:
- a stack comprising a plurality of first conductive lines at a number of levels separated from one another by at least an insulation material;
- at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines;
- storage element material formed around the at least one conductive extension;
- and
- cell select material formed around the at least one conductive extension,
- wherein the at least one conductive extension, storage element material, and cell select material are located between co-planar pairs of the plurality of first conductive lines.
A three dimensional memory array, comprising:
- a stack comprising a plurality of first conductive lines at a number of levels separated from one another by at least an insulation material;
- a number of memory cell structures, comprising:
- at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines;
- storage element material formed around the at least one conductive extension;
- and
- cell select material formed around the at least one conductive extension,
- wherein the number of memory cell structures are located between every other of the plurality of first conductive lines.
A memory array, comprising:
- a stack comprising a plurality of first conductive lines at a number of levels separated from one another by at least an insulation material;
- a plurality of memory cell structures located between each of the plurality of first conductive lines, each memory cell structure comprising:
- at least one conductive extension arranged to extend substantially perpendicular to the plurality of first conductive lines;
- storage element material formed proximal the at least one conductive extension;
- and
- cell select material formed proximal the at least one conductive extension;
- a first plurality of second conductive lines formed over the plurality of first conductive lines and the plurality of memory cell structures;
- a second plurality of second conductive lines formed under the plurality of first conductive lines and the plurality of memory cell structures,
- wherein alternating ones of the plurality of memory cell structures in a direction perpendicular to the plurality of first conductive lines are coupled to the first plurality of second conductive lines and remaining alternating ones of the plurality of memory cell structures in the direction perpendicular to the plurality of first conductive lines are coupled to the second plurality of second conductive lines.
Dependencies are inferred from the claim text.