Transparent clock for precision timing distribution

A computer-readable storage medium encoded with instruction for causing one or more programmable processors of a network having asymmetric delay to:

• calculate a downstream residence time of a time synchronization protocol packet within the network;
• encode the residence time into the packet;
• forward the packet to a client device;
• receive the packet from the client device after forwarding the packet to the client device;
• calculate an upstream residence time of the packet;
• encode the upstream residence time in the packet;
• forward the packet to a grandmaster clock;
• receive, from the client device, a delay request packet;
• add an upstream residence time value to a time stamp correction field of the delay request packet;
• forward the delay request packet to the grandmaster clock;
• receive the delay request packet back from the grandmaster clock;
• add a downstream residence time value to the time stamp correction field of the delay request packet after receiving the delay request packet back from the grandmaster clock;
• and
• forward the delay request packet to the client device to cause the client device to synchronize a local clock of the client device to the grandmaster clock.