Contact structure of semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Hsien Wu, Chih-Hsin Ko, Clement Hsingjen Wann
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Abstract
A contact structure for a semiconductor device includes a substrate comprising a major surface and a cavity. A bottom surface of the cavity is lower than the major surface. The contact structure also includes a strained material in the cavity, and a lattice constant of the strained material is different from lattice constant of the substrate. The contact structure also includes a first metal layer over the strained material, a dielectric layer over the first metal layer, and a second metal layer over the dielectric layer. The dielectric layer has a thickness ranging from 1 nm to 10 nm.
Claims20
A contact structure for a semiconductor device comprising:
- a substrate comprising a major surface and a cavity, the cavity having a bottom surface lower than the major surface;
- a strained material in the cavity, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and the strained material extends upward over the major surface of the substrate;
- a first metal layer over the strained material;
- a dielectric layer over the first metal layer, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm;
- and
- a second metal layer over the dielectric layer.
A metal oxide semiconductor field effect transistor (MOSFET) comprising:
- a substrate comprising a major surface and a cavity, the cavity having a bottom surface lower than the major surface;
- a gate stack on the major surface of the substrate;
- a shallow trench isolations (STI) region within the substrate, the cavity being between the STI region and the gate stack;
- and
- a contact structure at least partially in the cavity, wherein the contact structure comprises:
- a strained material in the cavity, wherein a lattice constant of the strained material is different from a lattice constant of the substrate, and the strained material extends upward over the major surface of the substrate;
- a first metal layer over the strained material;
- a dielectric layer over the first metal layer, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm;
- and
- a second metal layer over the dielectric layer.
A transistor, comprising:
- a fin structure comprising a major surface and a cavity, the cavity having a bottom surface lower than the major surface;
- a gate stack on the major surface of the fin structure;
- and
- a contact structure comprising:
- an epitaxially grown strained material in the cavity, wherein the strained material extends upward beyond the major surface,
- a first metal layer over the strained material completely covering an upper surface of the strained material;
- a dielectric layer over the first metal layer;
- and
- a second metal layer over the dielectric layer.
Dependencies are inferred from the claim text.