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US 8,713,384 B2Granted
Semiconductor apparatus
AssigneeSK hynix Inc.
InventorByung Deuk Jeon
Life of this patent
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Abstract
A semiconductor apparatus includes first and second chips sharing first and second data channels. The first and second chips output normal data of the respective chips through the first and second data channels in a normal operation, and the first chip outputs test data of the first chip through the first data channel, and the second chip outputs test data of the second chip through the second data channel in a test operation.
Claims12
A semiconductor apparatus comprising first and second chips sharing first and second data channels,
- wherein the first and second chips output normal data of the respective chips through the first and second data channels in a normal operation, and
- the first chip outputs test data of the first chip through the first data channel, and the second chip outputs test data of the second chip through the second data channel in a test operation,
- wherein the first chip comprises a first data selection unit configured to output the normal data of the first chip to a plurality of first-chip data lines, respectively, in the normal operation, and output the test data of the first chip to the plurality of first-chip data lines in the test operation;
- and
- a first data output unit configured to output the normal data of the first chip, which are transmitted through the plurality of data lines, through the first and second data channels, respectively, in the normal operation, and output the test data of the first chip, which are transmitted through the plurality of data lines, through the first data channel.
2 more elements
A semiconductor apparatus comprising:
- a data output control unit configured to generate first and second enable signals in response to a test control signal and a chip selection signal;
- a data selection unit configured to output first and second normal data to first and second data lines, respectively, or output test data to the first and second data lines in common, in response to a test control signal;
- a first driver configured to output the data transmitted through the first data line to a first data channel in response to the first enable signal;
- and
- a second driver configured to output the data transmitted through the second data line to a second data channel in response to the second enable signal.
2 more elements
Dependencies are inferred from the claim text.