Control apparatus and control method

A control apparatus for controlling testing of a memory under test that includes a plurality of memory cells addressed according to rows and columns, one or more row repair memory blocks that are each capable of replacing a row-oriented memory block en bloc, and one or more column repair memory blocks that are each capable of replacing a column-oriented memory block en bloc, the control apparatus comprising:

• a first counting section that sequentially receives test results from a testing section testing the memory under test indicating pass/fail of each of a plurality of test blocks of the memory under test, and sequentially counts, for each first-type memory block, a fail memory block number, which is the number of memory blocks judged to be fails among second-type memory blocks, wherein either i) a first-type memory block denotes a row-oriented memory block and a second-type memory block denotes a column-oriented memory block or ii) a first-type memory block denotes a column-oriented memory block and a second-type memory block denotes a row-oriented memory block;
• a selecting section that, when the test blocks have been tested by the testing section, selects memory blocks, from among the first-type memory blocks, for which the fail memory block number exceeds a reference value, such that the number of selected memory blocks is no greater than the number of first-type repair memory blocks of the memory under test, wherein a first-type repair memory block denotes a row repair memory block if the first-type memory block denotes a row-oriented memory block, and a first-type repair memory block denotes a column repair memory block if the first-type memory block denotes a column-oriented memory block;
• a test control section that masks test blocks included in the memory blocks selected by the selecting section, and causes the testing section to perform further testing of the memory under test;
• and
• a judging section that sequentially receives the test results from the testing section testing the memory under test masked by the test control section, and sequentially judges whether each second-type memory block includes a test block that is judged to be a fail.