US 8,713,380 B2 · Non-volatile memory and method having efficient on-chip block-copying with controlled error rate

Abstract

A non-volatile memory chip having SLC blocks acting as a write cache for MLC blocks for high density storage requires constant copying or folding of SLC blocks into MLC blocks. To avoid the time-consuming toggling out and in of the pages of the entire SLC block for ECC checking by a controller chip, only a small sample is checked. An optimal read point for reading the memory cells in the sample of the SLC block is dynamically determined by trying different read points so that the data is read within an error budget. Once the optimal read point is determined, it is used to read the entire SLC block without further error checking. Then the SLC block can be copied (blind folded) to the MLC block with the confidence of being within the error budget.

Claims20

Dependent claims

A method of reading a block of data with controlled error rate from a non-volatile memory, comprising:

(a) organizing the non-volatile memory into blocks of memory cells that are erasable as a unit, each block for storing a plurality of pages;
(b) determining an optimum read threshold voltage for reading all pages of the block by selecting a predetermined trial read threshold voltage for reading sample pages in the block that after checking for error rates are all within the controlled error rate;
(c) if not all the sample pages are within the controlled error rate, repeating (b) by selecting a different predetermined trial read threshold voltage for the optimum read threshold voltage until all the sample pages are within the controlled error rate;
and
(d) if all the sample of pages are within the controlled error rate, reading the entire block relative to the optimum read threshold voltage without further checking the error rate of the pages in the block.

2 more elements

Dependencies are inferred from the claim text.

Non-volatile memory and method having efficient on-chip block-copying with controlled error rate

Life of this patent

Non-volatile memory and method having efficient on-chip block-copying with controlled error rate

Life of this patent

Abstract

Claims20