Out-of-order load/store queue structure
AssigneeAdvanced Micro Devices, Inc.
InventorChristopher D. Bryant
Life of this patent
Estimating the term…
Abstract
The present invention provides a method and apparatus for supporting embodiments of an out-of-order load/store queue structure. One embodiment of the apparatus includes a first queue for storing memory operations adapted to be executed out-of-order with respect to other memory operations. The apparatus also includes one or more additional queues for storing memory operation in response to completion of a memory operation. The embodiment of the apparatus is configured to remove the memory operation from the first queue in response to the completion.
Claims27
An apparatus, comprising:
- a first queue for storing at least one memory operation adapted to be executed out-of-order with respect to other memory operations;
- a second queue for storing information indicating a program order of said at least one memory operation, wherein the second queue is configured to be searched to determine if said at least one memory operation completed out of order with respect to at least one of the other memory operations;
- and
- at least one additional queue for storing said at least one memory operation in response to completion of said at least one memory operation, wherein the apparatus is configured to remove said at least one memory operation from the first queue in response to said completion.
An apparatus, comprising:
- means for storing at least one memory operation adapted to be executed out-of-order with respect to other memory operations;
- means for storing information indicating a program order of said at least one memory operation, wherein the means for storing information is configured to be searched to determine if said at least one memory operation completed out of order with respect to at least one of the other memory operations;
- and
- means for storing said at least one memory operation in response to completion of said at least one memory operation, wherein the apparatus is configured to remove said at least one memory operation from the means for storing at least one memory operation in response to said completion.
A method, comprising:
- storing at least one memory operation in a first queue, wherein said at least one memory operation is adapted to be executed out-of-order with respect to other memory operations;
- storing information indicating a program order of said at least one memory operation in a second queue, wherein the second queue is configured to be searched to determine if said at least one memory operation completed out of order with respect to at least one of the other memory operations;
- and
- moving said at least one memory operation from the first queue to at least one additional queue in response to completion of said at least one memory operation.
A non-transitory computer readable media storing instructions that when executed configures a manufacturing process used to manufacture a semiconductor device comprising:
- a first queue for storing at least one memory operation adapted to be executed out-of-order with respect to other memory operations;
- a second queue for storing information indicating a program order of said at least one memory operation, wherein the second queue is configured to be searched to determine if said at least one memory operation completed out of order with respect to at least one of the other memory operations;
- and
- at least one additional queue for storing said at least one other memory operation in response to completion of said at least one memory operation, wherein the semiconductor device is configured to remove said at least one memory operation from the first queue in response to said completion.
Dependencies are inferred from the claim text.