Method for adjusting link speed and computer system using the same
AssigneePegatron Corporation
InventorKang-Ning Feng
Life of this patent
Estimating the term…
Abstract
A method for adjusting a link speed and a computer system using the same are provided. The method is used after executing a boot block code and before executing a bus enumeration procedure. A testing step is executed using a maximum link speed supported by both a bridge and a peripheral device. If the test fails, the link speed is adjusted down until the test succeeds, thus automatically adjusting the link speed of the bridge.
Claims10
A method for adjusting a link speed, used after executing a boot block code and before executing a bus enumeration procedure, the method at least comprising the following steps of:
- reading a bus information list to select a target bridge;
- allocating a temporary bus number to the target bridge;
- determining whether a bus of the target bridge is connected with the peripheral device according to the temporary bus number;
- if the target bridge is connected with a peripheral device, taking a maximum link speed supported by both the target bridge and the peripheral device as the link speed between the target bridge and the peripheral device;
- testing whether the target bridge is capable of accessing the peripheral device;
- if the target bridge fails to access the peripheral device, adjusting the link speed down and re-establishing a connection between the target bridge and the peripheral device;
- and
- re-executing the steps of testing whether the target bridge is capable of accessing the peripheral device and adjusting the link speed down if the target bridge fails to access the peripheral device until the target bridge is capable of accessing the peripheral device.
A computer system comprising:
- a central processing unit (CPU) executing a boot block code;
- a control chip coupled to the CPU;
- and
- a basic input/output system (BIOS) unit coupled to the control chip,
- wherein after the CPU executes the boot block code and before the BIOS unit executes a bus enumeration procedure, the BIOS unit reads a bus information list to select a target bridge, allocates a temporary bus number to the target bridge, determines whether a bus of the target bridge is connected with the peripheral device according to the temporary bus number, takes a maximum link speed supported by both the target bridge and a peripheral device as the link speed between the target bridge and the peripheral device if the target bridge is connected with the peripheral device, and tests whether the target bridge is capable of accessing the peripheral device, and if the target bridge fails to access the peripheral device, the BIOS unit adjusts the link speed down, and after a connection between the target bridge and the peripheral device is re-established, the BIOS unit re-executes the steps of testing whether the target bridge is capable of accessing the peripheral device and adjusting the link speed down if the target bridge fails to access the peripheral device until the target bridge is capable of accessing the peripheral device.
Dependencies are inferred from the claim text.