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US 8,713,216 B2Granted
Processor and data transfer method
AssigneeFujitsu Limited
InventorsKumiko Endo, Naoya Ishimura
Life of this patent
Estimating the term…
Abstract
A processor. In response to requests from a processing section, first and second memory controllers transfer first and second data items to the processing section via first and second buses, respectively. When transfers of the data items are concurrently performed via the first and second buses, one of the data items is transferred to the processing section by the buffer controller, and the other of the data items is stored in the buffer by the buffer controller. Then, after termination of transfer of the one of the data items, the other data item is transferred from the buffer to the processing section by the buffer controller.
Claims8
A processor comprising:
- a plurality of processing sections that outputs a first request and a second request;
- a first memory controller that receives the first request from the plurality of processing sections;
- a second memory controller that receives the second request from the plurality of processing sections;
- a first memory that is connected to the first memory controller and controlled by the first memory controller to output first data via a first bus associated with the first request;
- a second memory that is connected to the second memory controller and controlled by the second memory controller to output second data via a second bus associated with the second request;
- and
- a buffer controller that includes a buffer and is connected to the first memory via the first bus and the second memory via the second bus, and transfers the first data or the second data which is transferred over a greater distance than the other data to a processing section, stores the first data or the second data which is not transferred in the buffer, and transfers the first data or the second data stored in the buffer to the processing section after termination of transferring the first data or the second data which is greater in data transfer distance than the other data, when outputting of the first data from the first memory and outputting of the second data from the second memory are performed simultaneously;
- wherein:
- during transfer of data outputted via one of the first bus and the second bus to a processing section, the buffer controller stores data outputted via the other of the first and second bus;
- and
- the first and second busses connect to the plurality of processing sections, respectively, and when one of the first and second memory controllers receives an associated one of the first and second requests from one of the plurality of processing sections, the one of the first and second memory controller terminates receiving a request from any of the processing sections connected to a same bus as one of the first and second buses connected to the one of the plurality of processing sections which has outputted the request for a predetermined time period.
8 more elements
A data transfer method for a processor having a buffer controller that includes a buffer, the data transfer method comprising:
- outputting a first request and a second request from a plurality of processing sections of the processor;
- receiving the first request from the plurality of processing sections by a first memory controller of the processor;
- receiving the second request from the plurality of processing sections by a second memory controller of the processor;
- outputting first data associated with the first request via a first bus from a first memory connected to the first memory controller;
- outputting second data associated with the second request via a second bus from a second memory connected to the second memory controller;
- transferring the first data or the second data which is transferred over a greater distance than the other data to a processing section, storing the first data or the second data which is not transferred in the buffer;
- and transferring the first data or the second data stored in the buffer to the processing section after termination of transferring of the first data or the second data which is greater in data transfer distance than the other data by the buffer controller is connected to the first memory via the first bus and the second memory via the second bus, when outputting of the first data from the first memory and outputting of the second data from the second memory are performed simultaneously;
- wherein:
- during transfer of data outputted via one of the first bus and the second bus to a processing section, the buffer controller stores data outputted via the other of the first and second bus;
- and
- the first and second busses connect to the plurality of processing sections, respectively, and when one of the first and second memory controllers receives an associated one of the first and second requests from one of the plurality of processing sections, the one of the first and second memory controller terminates receiving a request from any of the processing sections connected to a same bus as one of the first and second buses connected to the one of the plurality of processing sections which has outputted the request for a predetermined time period.
8 more elements
Dependencies are inferred from the claim text.