Three-term predictive adder and/or subtracter
AssigneeTexas Instruments Incorporated
InventorsTimothy D. Anderson, Mujibur Rahman, Kai Chirca
Life of this patent
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Abstract
A predictive adder produces the result of incrementing and/or decrementing a sum of A and B by a one-bit constant of the form of the form 2k, where k is a bit position at which the sum is to be incremented or decremented. The predictive adder predicts the ripple portion of bits in the potential sum of the first operand A and the second operand B that would be toggled by incrementing or decrementing the sum A+B by the one-bit constant to generate and indication of the ripple portion of bits in the potential sum. The predictive adder uses the indication of the ripple portion of bits in the potential sum and the carry output generated by evaluating A+B to produce the results of at least one of A+B+2k and A+B−2k.
Claims16
A predictive adder, comprising:
- a full adder that is arranged to add a first operand and a second operand to produce a sum of the first and second operand and to generate a carry output in response to the addition of the first and second operands;
- and
- at least one of a consecutive ones predictor and a consecutive zeros predictor, wherein the consecutive ones predictor is arranged to evaluate the first and second operands to generate an indication of a ripple portion of bits in a potential sum of the first and second operands that are predicted to be toggled by incrementing the potential sum of the first and second operands at a bit position determined by k, where k determines a one-bit constant of the form 2k, and that is arranged to produce the sum of the first and second operands and the one-bit constant in response to the indication of the ripple portion of bits in the potential sum of the first and second operands and the carry output generated by the full adder, and wherein the consecutive zeros predictor is arranged to evaluate the first and second operands to generate an indication of a ripple portion of bits in the potential sum of the first and second operands that are predicted to be toggled by incrementing the potential sum of the first and second operands at a bit position determined by k, where k determines a one-bit constant of the form 2k, and that is arranged to produce the sum of the first and second operands with the one-bit constant subtracted therefrom in response to the indication of the ripple portion of bits in the potential sum of the first and second operands and the carry output generated by the full adder.
A digital system, comprising:
- a memory for storing and retrieving data;
- a processor that is arranged to access the memory to store and retrieve the data and wherein the processor includes a full adder that is arranged to generate addresses for storing and retrieving the data in the memory by receiving a first operand A and a second operand B to produce a sum A+B and to generate a carry output in response to producing the sum of A+B, and wherein the processor includes a consecutive digits predictor that is arranged to evaluate the first operand A and second operand B to generate an indication of a ripple portion of consecutive bits in a potential sum of the first operand A and second operand B that are predicted to be toggled by respectively incrementing or decrementing the potential sum at a bit position determined by k, where k determines a one-bit constant of the form 2k, and wherein the processor is arranged to respectively evaluate A+B+2k or A+B−2k in response to the indication of the ripple portion of bits in the potential sum of the first operand A, the second operand B, and the carry output generated by the full adder.
Dependencies are inferred from the claim text.