System and method of verification of analog circuits
AssigneeQUALCOMM Incorporated
InventorJesse Eugene Chen
Life of this patent
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AssigneeQUALCOMM Incorporated
InventorJesse Eugene Chen
Estimating the term…
In a particular embodiment, a first digital function module is created that represents a first analog circuit and a second digital function module is created that represents a second analog circuit. A first value representing a first analog signal is transmitted from the first digital function module to the second digital function module while concurrently or substantially currently, the second digital function module transmits a second value representing a second analog signal to the first digital function module. In a particular embodiment, the first digital function module is a current signal related to an output of the first analog circuit and the second analog signal from the second digital function module is a voltage signal related to an output of the second analog circuit. The values may be transmitted along a bidirectional analog data bus capable of communicating real floating point numbers.
A system comprising:
An apparatus comprising:
A method comprising:
A method comprising:
A non-transitory computer-readable medium storing code that, when executed by a computer, causes the computer to:
A method comprising:
A method comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.
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Circuit design at the analogue level: design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE],…
Circuit design: circuit design at the analogue level
Circuit design: circuit design at the mixed level of analogue and digital signals
Computer-aided design [CAD]: design optimisation, verification or simulation
About 3 years 7 months of term left · ends 24 May 2030 (estimated)
The present disclosure is generally related to a system and method of verification of radio frequency and analog chips.
Advances in technology have resulted in smaller and more powerful personal computing devices. For example, there currently exist a variety of portable personal computing devices, including wireless computing devices, such as portable wireless telephones, personal digital assistants (PDAs), and paging devices that are small, lightweight, and easily carried by users. More specifically, portable wireless telephones, such as cellular telephones and Internet Protocol (IP) telephones, can communicate voice and data packets over wireless networks. Further, many such wireless telephones include other types of devices that are incorporated therein. For example, a wireless telephone can also include a digital still camera, a digital video camera, a digital recorder, and an audio file player. Most of these devices contain both analog and digital circuits.
Testing the analog and digital circuits during the circuit design phase can be time consuming. Verification is typically performed in a digital design environment. Analog blocks are problematic for a digital design environment because digital modeling languages do not naturally pass real numbers between modules. One approach to passing real numbers is to convert the real numbers to 64 bit words, expand a single pin into a 64-bit bus, pass the 64 bit word, and then convert the digital word back into a real number. However, a problem with the 64-bit approach is that such models may not be pin-accurate and simulation and circuit layout schematics could diverge.
FIG. 1 is a block diagram that illustrates a particular embodiment of a system having an analog design environment including analog equivalent digital function modules;
FIG. 2 is a block diagram that illustrates further details of equivalent digital function modules of the system of FIG. 1;
FIG. 3 is a block diagram that illustrates further details of the data types used by the digital function modules of the system of FIG. 1;
Referring to FIG. 1, a block diagram of a particular embodiment of a computer system that is generally designated 100 is shown. The computer system 100 includes an electronic design verification system 102, a display device 130, and input/output devices 132. The electronic design verification system 102 includes a processor 104, a memory 106, and an analog design environment 112. The memory 106 includes a module database 108 and data files 110. The analog design environment 112 includes a plurality of modules including a first analog equivalent digital function module 114 and a second analog equivalent digital function module 118. The first analog equivalent digital function module 114 includes a first set of analog data pins 116. The second analog equivalent digital function module 118 includes a second set of analog data pins 120. The first set of analog data pins 116 are coupled to the second set of analog data pins 120 via a bi-directional analog data bus 126. The bi-directional analog data bus 126 concurrently, or substantially concurrently, carries a first value 150 representing a first analog signal from the first analog equivalent digital function module 114 to the second analog equivalent digital function module 118 and a second value 140 representing a second analog signal from the second analog equivalent digital function module 118 to the first analog equivalent digital function module 114. In a particular embodiment, the first value 150 and the second value 140 are real floating point number values representing analog signals. In a particular embodiment, the first value 150 represents a current value and the second value 140 represents a voltage value.
For example, the first value 150 and the second value 140 may emulate values of the first and second analog signals that occur at the same time in an analog circuit and/or during a common simulation execution step. The bi-directional analog data bus 126 transfers the first value 150 and the second value 140 so that subsequent simulation execution steps that rely on the first value 150 or the second value 140 are provided updated values prior to execution. To illustrate, the bi-directional analog data bus 126 may transfer the first value 150 and the second value 140 for each particular simulation execution step prior to each subsequent simulation execution step. Although the bi-directional analog data bus 126 may represent a single wire in the analog circuit, the first value 150 and the second value 140, in addition to one or more other values, may be carried between the analog equivalent digital function modules 114 and 118 as real numbers without modeling the bi-directional analog data bus 126 as a multiple-bit parallel bus and also without modeling the bi-directional analog data bus 126 as a single wire serially transmitting bit values to “telegraph” the first and second values 150 and 140 between modules.
In a particular embodiment, the bi-directional analog data bus 126 may be referred to as a hyperwire bus through which analog data may be communicated. In another particular embodiment, if current and voltage are related to a particular common port, the design environment may include a small delay that could prevent a resulting algebraic loop that may stall execution. The input and output units of the bi-directional analog data bus 126 are complementary such that if the output units are volts, the inputs units are amps and if the output units are amps, then the input units are volts. In this case, output refers to a quantity that is being directly controlled or driven by a circuit represented by one of the modules 114, 118.