Powerline communication receiver
AssigneeLandis+Gyr Technologies, LLC
InventorJames Hilmer Glende
Life of this patent
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Abstract
Aspects of the present disclosure are directed towards a circuit-based apparatus for receiving data communications over power distribution lines that carry power using alternating current (AC). The apparatus has a processing circuit that is configured and arranged to receive an input signal representing the data communications over power distribution lines. For a quadrature encoded signal, the input signal is separated into intermediary signals representing a real portion of and an imaginary portion. The processing circuit can then determine timing information from the real portion of and the imaginary portion. The intermediary signals can then be decimated according to a variable rate of decimation that is responsive to the determined timing information. The decimated intermediary signals are also filtered.
Claims20
A circuit-based apparatus for receiving data communications over power distribution lines that carry power using alternating current (AC), the apparatus comprising:
- a processing circuit configured and arranged to
- receive an input signal representing the data communications over power distribution lines;
- produce intermediary signals from each of a real portion of an input signal and an imaginary portion of the input signal;
- detect symbol boundaries by processing the intermediary signals at an initial sample rate;
- reduce the initial sample rate of the intermediary signals according to a decimation rate;
- filter the intermediary signals at the reduced sample rate;
- determine a timing mismatch between the detected symbol boundaries and samples corresponding to the reduced sample rate;
- and
- adjust the decimation rate in response to the determined timing mismatch.
A circuit-based apparatus for receiving data communications over power distribution lines that carry power using alternating current (AC), the apparatus comprising:
- a processing circuit configured and arranged to
- receive an input signal representing the data communications over power distribution lines;
- produce intermediary signals from each of a real portion of an input signal and an imaginary portion of the input signal;
- process the intermediary signals to determine timing information for the intermediary signals;
- decimate the intermediary signals according to a variable rate of decimation that is responsive to the determined timing information;
- and
- apply a filter to the decimated intermediary signals.
A circuit-based method for receiving data communications over power distribution lines that carry power using alternating current (AC), the method comprising:
- using a processing circuit to
- receive an input signal representing the data communications over power distribution lines;
- produce intermediary signals from each of a real portion of an input signal and an imaginary portion of the input signal;
- detect symbol boundaries by processing the intermediary signals at an initial sample rate;
- reduce the initial sample rate of the intermediary signals according to a decimation rate;
- filter the intermediary signals at the reduced sample rate;
- determine a timing mismatch between the detected symbol boundaries and samples corresponding to the reduced sample rate;
- and
- adjust the decimation rate in response to the determined timing mismatch.
A device comprising:
- one or more processing circuits configured and arranged to include or provide
- a first integrator configured to generate a first integration output representing the integration of a real portion of a symbol;
- a second integrator configured to generate a second integration output representing the integration of an imaginary portion of the symbol;
- a signal strength indicator configured to determine a signal strength from the first integration output and the second integration output;
- a decimator controller configured to generate a decimator control signal in response the signal strength;
- a first decimator configured to reduce a first sample rate of the first integration output to a sample rate that is controlled by the decimator control signal;
- a second decimator configured to reduce a second sample rate of the second integration output to a sample rate that is controlled by the decimator control signal;
- a first comb filter configured to filter the output of the first decimator;
- and
- a second comb filter configured to filter the output of the second integrator.
Dependencies are inferred from the claim text.