Method and apparatus for detecting an intermittent path to a storage system

#1. Field of the Invention

#The present invention generally relates to computer storage system technology. More particularly, the present invention pertains to a method and apparatus for detecting an intermittent path between a host computer and a storage system.

#2. Description of the Related Art

#So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

#FIG. 1 is a schematic overview of a computing environment having a host computer coupled to a storage system in accordance with at least one embodiment of the present invention;

#FIG. 2 depicts a flow diagram of a method for detecting an I/O failure within the computing environment of FIG. 1;

#FIG. 1 is a block diagram of a computing environment 100 employing an apparatus for detecting an intermittent path between a host computer (host 102) and a storage system 108 in accordance with at least one embodiment of the present invention. The environment 100 comprises a host 102, a storage system 108, and storage array 110. In a Direct Attached Storage (DAS) configuration, the host 102 is directly connected to the storage system 108 via a path 106. Path 106 may comprise a plurality of redundant paths. In a Storage Area network (SAN) configuration, the host 102 is coupled to the storage system 108 through a SAN fabric 104, e.g., a data communications network.

#The apparatus is usable for practicing a method for detecting and processing I/O failure and, upon restoring a path, detecting an intermittent path, in conformity with the principles of the present invention. Details in connection with the method are disclosed with reference to FIGS. 2-5.

#The host 102 is a computing device, such as a server or client that uses the services of the storage system 108. The host 102 comprises, without limitation, a central processing unit (CPU) 112, support circuits 114, and a memory 116. The CPU 112 may be one or more of any commercially available microprocessors or microcontrollers. The support circuits 114 comprise circuits and devices that are used in support of the operation of the CPU 112. The support circuits 114 include, for example, one or more of cache, input/output circuits, system bus, PCI bus, clock circuits, power supplies, or the like. Those skilled in the art will appreciate that the hardware depicted in the FIG. 1 may vary from one computer system to another. For example, various peripheral devices, such as optical disk drives, graphics card, data storage devices, various input/output devices, and the like, may also be used in addition to or in place of the hardware depicted.