Multi-port, gigabit SERDES transceiver capable of automatic fail switchover

A transceiver, comprising:

• a first port configured to transmit and to receive data over a first plurality of lanes;
• a second port configured to transmit and to receive the data over a second plurality of lanes;
• and
• a switch selectively coupled to the first port and the second port;
• wherein the switch is configured to activate the second port and to deactivate the first port when;
• a number of errors at a first lane from among the first plurality of lanes exceeds a threshold, or
• the data at a second lane from among the first plurality of lanes is misaligned with the data at other lanes from among the first plurality of lanes, and
• wherein the switch is further configured to begin its determination of whether the number of errors at the first lane exceeds the threshold substantially simultaneously with its determination of whether the data at the second lane is misaligned with the data at the other lanes.

A transceiver, comprising:

• a first port configured to transmit and to receive data over a first plurality of lanes;
• a second port configured to transmit and to receive the data over a second plurality of lanes;
• and
• a switch selectively coupled to the first port and the second port;
• wherein the switch is configured to activate the second port and to deactivate the first port when:
• the data at a first lane from among the first plurality of lanes is misaligned, or
• the data at a second lane from among the first plurality of lanes is misaligned with the data at other lanes from among the first plurality of lanes, and
• wherein the switch is further configured to begin its determination of whether the data at the first lane is misaligned substantially simultaneously with its determination of whether the data at the second lane is misaligned with the data at the other lanes.