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US 8,711,618 B2Granted
Method for programming non-volatile memory device and apparatuses performing the method
AssigneeSamsung Electronics Co., Ltd.
InventorsSeong Hyeog Choi, Hong Rak Son, Jun Jin Kong, Yong June Kim
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Abstract
A method of programming multi-level cells included in a spare region, the method including programming first page data and at least one first dummy data in a first multi-level cell; and programming second page data and at least one second dummy data in a second multi-level cell.
Claims17
A method of programming multi-level cells included in a spare region, the method comprising:
- programming first page data and at least one first dummy data in a first multi-level cell;
- and
- programming second page data and at least one second dummy data in a second multi-level cell,
- wherein the programming in the first multi-level cell includes,
- programming the first page data as a first bit in the first multi-level cell,
- reading the first bit programmed in the first multi-level cell, and
- programming the first dummy data in the first multi-level cell as a second bit of the first multi-level cell according to the read first bit.
4 more elements
A non-volatile memory device comprising:
- a spare region including a first multi-level cell and a second multi-level cell;
- and
- a control logic configured to control programming of first page data and at least one first dummy data in the first multi-level cell and programming of second page data and at least one second dummy data in the second multi-level cell,
- wherein the control logic includes,
- a page data control logic configured to control programming of the first page data in the first multi-level cell as a first bit of the first multi-level cell and reading of the first bit of the first multi-level cell;
- and
- a dummy data control logic configured to control programming of the first dummy data in the first multi-level cell as a second bit of the first multi-level cell according to the read first bit.
4 more elements
An electronic device comprising:
- a non-volatile memory device;
- and
- a processor capable of controlling an operation of the non-volatile memory device,
- wherein the non-volatile memory device includes
- a spare region including a first multi-level cell and a second multi-level cell;
- and
- a control logic configured to control programming of first page data and at least one first dummy data in the first multi-level cell and programming of second page data and at least one second dummy data in the second multi-level cell,
- wherein the control logic includes,
- a page data control logic configured to control programming of the first page data as a first bit in the first multi-level cell and configured to control reading of the first bit programmed in the first multi-level cell, and
- a dummy data control logic configured to control programming of the first dummy data as a second bit in the first multi-level cell according to the read first bit.
7 more elements
Dependencies are inferred from the claim text.