US 8,711,615 B2Granted

Memory kink checking

AssigneeMicron Technology, Inc.

InventorsUday Chandrasekhar, Mark A. Helm

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Abstract

This disclosure concerns memory kink checking. One embodiment includes selectively applying one of a plurality of voltages to a first data line according to a programming status of a first memory cell, wherein the first memory cell is coupled to the first data line and to a selected access line. An effect on a second data line is determined, due at least in part to the voltage applied to the first data line and a capacitive coupling between at least the first data line and the second data line, wherein the second data line is coupled to a second memory cell, the second memory cell is adjacent to the first memory cell, and the second memory cell is coupled to the selected access line. A kink correction is applied to the second data line, responsive to the determined effect, during a subsequent programming pulse applied to the second memory cell.

Claims13

Dependent claims

A method for operating a memory device, comprising:

performing a first kink check before applying a programming pulse including:
floating first data lines and selectively applying one of a plurality of voltages to second data lines, wherein the voltage applied to a respective one of the second data lines is dependent upon a programming status of a memory cell coupled to that second data line and to an access line, wherein a plurality of memory cells coupled to the access line are alternately associated with a respective one of the first data lines and the second data lines;
and
sensing the first data lines;
and
performing a second kink check before applying the programming pulse including:
floating the second data lines and selectively applying one of the plurality of voltages to the first data lines, wherein the voltage applied to a respective one of the first data lines is dependent upon a programming status of a memory cell of the plurality of memory cells that is coupled to that first data line and to the access line;
and
sensing the second data lines.

6 more elements

A memory device, comprising:

memory cells coupled to an access line;
data lines, each associated with a respective one of the memory cells;
control circuitry coupled to the data lines, wherein the control circuitry is configured to:
perform a first kink check before applying a programming pulse including
float first data lines and selectively apply one of a plurality of voltages to second data lines, wherein the voltage applied to a respective one of the second data lines is dependent upon a programming status of a memory cell coupled to that second data line and to an access line, wherein a plurality of memory cells coupled to the access line are alternately associated with a respective one of the first data lines and the second data lines;
and
sense the first data lines;
and
perform a second kink check before applying the programming pulse including:
float the second data lines and selectively apply one of the plurality of voltages to the first data lines, wherein the voltage applied to a respective one of the first data lines is dependent upon a programming status of a memory cell of the plurality of memory cells that is coupled to that first data line and to the access line;
and
sense the second data lines.

9 more elements

Dependencies are inferred from the claim text.