US 8,711,604 B2 · Non-volatile semiconductor memory and data processing method in non-volatile semiconductor memory

Abstract

A non-volatile semiconductor memory according to an embodiment includes: a data storage unit including a memory cell array and a writing circuit; an encoder that directs the writing circuit to write write data to the memory cell array; a writing determining circuit that determines whether the writing of the write data to the memory cell array within a predetermined number of writing operations fails or succeeds, inverts the write data to generate new write data when the writing of the write data fails, and directs the writing circuit to write the new write data to the memory cell array; a switching circuit that inverts read data which is read from the memory cell to generate new read data when the writing determining circuit determines that the writing of the write data fails; and a decoder that decodes the read data into the information data.

Claims12

Dependent claims

A non-volatile semiconductor memory comprising:

a data storage unit including a memory cell array that includes a plurality of memory cells and a writing circuit that performs an operation of writing write data to the memory cell array;
an encoder that generates the write data from information data and directs the writing circuit to write the write data to the memory cell array;
a writing determining circuit that determines whether the writing of the write data to the memory cell array within a predetermined number of writing operations fails or succeeds, inverts the write data to generate new write data when the writing of the write data fails, and directs the writing circuit to write the new write data to the memory cell array;
a switching circuit that inverts read data which is read from the memory cell to generate new read data when the writing determining circuit determines that the writing of the write data fails;
and
a decoder that receives the read data which is read from the memory cell array through the switching circuit and decodes the read data into the information data.

3 more elements

A data processing method in a non-volatile semiconductor memory that includes a memory cell array including a plurality of memory cells and a data storage unit, comprising:

writing data to the non-volatile semiconductor memory;
and
reading data from the non-volatile semiconductor memory,
the writing of the data to the non-volatile semiconductor memory including:
generating write data to be written to the memory cell array from information data;
performing an operation of writing the write data to the memory cell array within a predetermined number of writing operations;
determining whether the writing of the write data to the memory cell array within the predetermined number of writing operations fails or succeeds;
and
inverting the write data to generate new write data and writing the new write data to the memory cell array when the writing of the write data fails, and
the reading of the data from the non-volatile semiconductor memory including:
reading read data from the memory cell array;
inverting the read data to generate new read data when the writing of the write data to the memory cell array within the predetermined number of writing operations fails;
and
decoding the read data into the information data.

11 more elements

Dependencies are inferred from the claim text.

Non-volatile semiconductor memory and data processing method in non-volatile semiconductor memory

Life of this patent

Non-volatile semiconductor memory and data processing method in non-volatile semiconductor memory

Life of this patent

Abstract

Claims12