Liquid crystal display device

A semiconductor device comprising a first sub-pixel and a second sub-pixel, the semiconductor device comprising:

• a first line;
• a second line crossing the first line;
• a third line extending in parallel with the first line;
• a first switch wherein the first line is electrically connected to the first switch;
• a first pixel electrode of the first sub-pixel, wherein the first pixel electrode is electrically connectable to the second line through the first switch;
• a first capacitor wherein a first electrode of the first capacitor is electrically connected to the first pixel electrode;
• a second switch wherein the first line is electrically connected to the second switch;
• a second pixel electrode of the second sub-pixel, wherein the second pixel electrode is electrically connectable to the second line through the second switch;
• a second capacitor wherein a first electrode of the second capacitor is electrically connected to the second pixel electrode;
• a first thin film transistor wherein one of a source and a drain of the first thin film transistor is electrically connected to the second pixel electrode;
• and
• a third capacitor wherein a first electrode of the third capacitor is electrically connected to the other of the source and the drain of the first thin film transistor;
• and
• wherein a second electrode of the third capacitor is electrically connected to the third line,
• wherein the first sub-pixel is located on a first side of the first line and the second sub-pixel is located on a second side of the first line, the first side being opposite to the second side, and
• wherein the first thin film transistor comprises a channel which comprises indium, zinc and oxygen.

A module comprising:

• a circuit board;
• and
• a display panel electrically connected to the circuit board, the display panel comprising a first sub-pixel and a second sub-pixel, the display panel comprising:
• a first line;
• a second line crossing the first line;
• a third line extending in parallel with the first line;
• a first switch wherein the first line is electrically connected to the first switch;
• a first pixel electrode of the first sub-pixel, wherein the first pixel electrode is electrically connectable to the second line through the first switch;
• a first capacitor wherein a first electrode of the first capacitor is electrically connected to the first pixel electrode;
• a second switch wherein the first line is electrically connected to the second switch;
• a second pixel electrode of the second sub-pixel, wherein the second pixel electrode is electrically connectable to the second line through the second switch;
• a second capacitor wherein a first electrode of the second capacitor is electrically connected to the second pixel electrode;
• a first thin film transistor wherein one of a source and a drain of the first thin film transistor is electrically connected to the second pixel electrode;
• and
• a third capacitor wherein a first electrode of the third capacitor is electrically connected to the other of the source and the drain of the first thin film transistor;
• and
• wherein a second electrode of the third capacitor is electrically connected to the third line,
• wherein the first sub-pixel is located on a first side of the first line and the second sub-pixel is located on a second side of the first line, the first side being opposite to the second side.