Memory controller including a hardware compression and decompression engine for managing system memory and graphical operations

A system, comprising:

• one or more processors;
• memory;
• and
• a memory controller coupled to the one or more processors and to the memory, wherein the memory controller is configured to:
• receive a request from the one or more processors for a first block of data;
• in response to determining that the first block of data is stored in the memory as compressed data, identify a second block of data stored in the memory as uncompressed data;
• free a portion of the memory by compressing the second block of data and storing the compressed second block of data in the memory;
• decompress the first block of data;
• and
• store the decompressed first block of data in the memory.

An apparatus, comprising:

• means for storing data;
• means for requesting a first block of data that is stored as compressed data in the means for storing data;
• means for freeing a portion of the means for storing data, responsive to a determination that the first block of data is stored as compressed data, by compressing a second block of data stored therein, and by storing the compressed second block of data in the means for storing data;
• and
• means for decompressing the first block of data and causing the decompressed first block of data to be stored in the means for storing data.