LCD driving circuit in which shift register units are driven by a first clock signal of fixed duty/amplitude and a second clock signal of variable duty/amplitude
AssigneeAu Optronics Corporation
InventorsKuan-Yu Chen, Yi-Suei Liao
Life of this patent
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Abstract
An LCD device is configured to drive a plurality of shift register units using two clock signals having different driving abilities. Each shift register unit may thus generate a stronger signal for triggering a next-stage shift register unit, thereby improving cold-start. When the LCD device has been activated over a predetermined period of time, the driving ability of the clock signal having higher driving ability is gradually lowered, thereby reducing power consumption.
Claims9
A driving circuit, comprising:
- a plurality of shift register units among which an Nth-stage shift register unit includes:
- a node;
- an input circuit configured to maintain a voltage level of the node according to signals received from an Xth-stage shift register unit among the plurality of shift register units;
- a pull-up circuit configured to selectively couple a first clock signal to an output end of the Nth-stage shift register unit according to the voltage level of the node;
- and
- a pull-down circuit configured to selectively couple a second clock signal to a Yth-stage shift register unit among the plurality of shift register units according to the voltage level of the node, wherein a duty cycle of the second clock signal is larger than a duty cycle of the first clock signal, N is an integer larger than 1, X is a positive integer smaller than N, and Y is an integer larger than N;
- and
- an adjusting circuit configured to gradually shorten the duty cycle of the second clock signal after the driving circuit has been activated over a predetermined period of time.
A driving circuit, comprising:
- a plurality of shift register units among which an Nth-stage shift register unit includes:
- a node;
- an input circuit configured to maintain a voltage level of the node according to signals received from an Xth-stage shift register unit among the plurality of shift register units;
- a pull-up circuit configured to selectively couple a first clock signal to an output end of the Nth-stage shift register unit according to the voltage level of the node;
- and
- a pull-down circuit configured to selectively couple a second clock signal to a Yth-stage shift register unit among the plurality of shift register units according to the voltage level of the node, wherein a pulse amplitude of the second clock signal is larger than a pulse amplitude of the first clock signal, a duty cycle of the second clock signal is larger than a duty cycle of the first clock signal, N is an integer larger than 1, X is a positive integer smaller than N, and Y is an integer larger than N;
- and
- an adjusting circuit configured to gradually reduce the pulse amplitude of the second clock signal and gradually shorten a duty cycle of the second clock signal after the driving circuit has been activated over a predetermined period of time.
A method for driving a liquid crystal display device by providing a plurality of driving signals respectively during a plurality of driving periods, the method comprising:
- during an Nth-stage driving period among the plurality of driving periods, providing a first clock signal for supplying an Nth-stage driving signal among the plurality of driving signals and providing a second clock signal for supplying a trigger signal for an (N+1)th-stage driving period among the plurality of driving periods, wherein a duty cycle of the second clock signal is larger than a duty cycle of the first clock signal and N is a positive integer;
- and
- gradually reducing the duty cycle of the second clock signal after the liquid crystal device has been activated over a predetermined period of time.
A method for driving a liquid crystal display device by providing a plurality of driving signals respectively during a plurality of driving periods, the method comprising:
- during an Nth-stage driving period among the plurality of driving periods, providing a first clock signal for supplying an Nth-stage driving signal among the plurality of driving signals and providing a second clock signal for supplying a trigger signal for an (N+1)th-stage driving period among the plurality of driving periods, wherein a pulse amplitude of the second clock signal is larger than a pulse amplitude of the first clock signal, a duty cycle of the second clock signal is larger than a duty cycle of the first clock signal, and N is a positive integer;
- and
- gradually reducing the pulse amplitude of the second clock signal and gradually reducing the duty cycle of the second clock signal after the liquid crystal device has been activated over a predetermined period of time.
Dependencies are inferred from the claim text.