Coding circuitry for difference-based data transformation

An apparatus comprising:

• coding circuitry comprising a difference-based decoder having a plurality of processing stages, the difference-based decoder being configured to process encoded data comprising a selected subset of a plurality of orders of difference and to reconstruct a sequence of data samples based on the selected subset of the orders of difference;
• wherein said selected subset of the orders of difference comprises one or more but less than all of the plurality of orders of difference.

An apparatus comprising:

• coding circuitry comprising a difference-based encoder having a plurality of processing stages, the difference-based encoder being configured to generate a plurality of orders of difference from a sequence of data samples and to output encoded data determined based on at least a selected one of the orders of difference, wherein the difference-based encoder comprises n processing stages and is configured for each of a plurality of time steps k to process a set of n+1 data samples {xk−n, xk−n+1, . . . , xk} in order to compute n+1 orders of difference given by a set D(k)={Δ0(k), Δ1(k−1), . . . , Δn(k−n)} of orders of difference.

An apparatus comprising:

• coding circuitry comprising a difference-based decoder having a plurality of processing stages, the difference-based decoder being configured to process encoded data comprising selected ones of a plurality of orders of difference and to reconstruct a sequence of data samples based on the selected orders of difference, wherein the decoder at a given time step k maintains a set of state variables corresponding to respective orders of difference given by a set D(k)={Δ0(k−1), Δ1(k−2), . . . , Δn(k−n−1)} of orders of difference.