Variable speed traffic control system

A traffic control system comprising:

• a traffic control device that is preprogrammed by a central control station synchronized by a first radio clock;
• one or more variable speed limit signs for communicating with a first oncoming vehicle a variable speed limit to avoid a stop signal in the traffic control device comprising:
• a controller comprising:
• a first radio clock with an output to synchronize the controller with a traffic control device synchronized by a second radio clock, wherein the traffic control device is programmed with a predictable output schedule;
• a programmable memory device containing a timing sequence of the traffic control device and one or more traffic schedules;
• a processor for determining the variable speed limit for a vehicle to maintain to avoid a stop signal at the traffic control device, wherein the variable speed limit places the vehicle at the traffic control device at a precise time with a precise velocity and with a predetermined time delay so that the vehicle will not overtake a preceding vehicle;
• and
• a display operatively coupled to the controller for communicating the variable speed limit to the vehicle or optionally display, transmit, or display and transmit a programming status of the controller.

A method of regulating traffic with a variable speed limit sign comprising:

• providing a variable speed limit sign synchronized using a first radio clock with a traffic control device synchronized with a second radio clock;
• determining the time before the traffic control device displays a stop signal;
• determining the variable speed that a vehicle should maintain to avoid the stop signal at the traffic control device;
• displaying the required speed for the vehicle to maintain to avoid the stop signal at the traffic control device;
• wherein the variable speed limit sign comprises:
• a controller comprising:
• a first radio clock with an output to synchronize the controller with a traffic control device synchronized by a second radio clock, wherein the traffic control device is programmed with a predictable output schedule;
• a programmable memory device containing a timing sequence of the traffic control device and one or more traffic schedules;
• a processor for determining a variable speed limit for a vehicle to maintain to avoid a stop signal at the traffic control device, wherein the variable speed limit places the vehicle at the traffic control device at a precise time with a precise velocity and with a predetermined time delay so that the vehicle will not overtake a preceding vehicle;
• and
• a display operatively coupled to the controller for communicating the variable speed limit to the vehicle.