Apparatus, electronic component and method for generating reference voltage

An electronic component, comprising:

• a plurality of circuits, each of which operates with a reference voltage;
• a constant current generator which includes a band gap reference circuit configured to generate a criterion voltage for a first pMOS (p-channel type Metal-Oxide-Semiconductor) transistor and a bias circuit configured to generate a gate voltage for a second pMOS transistor operating in a saturation condition, said constant current generator generating a substantially constant current and distributing said substantially constant current to each of said circuits;
• and
• a plurality of converters, each of said converters respectively corresponding to each of said circuits, each of which converts said substantially constant current to said reference voltage and respectively provides said reference voltage to each of said circuits,
• wherein respectively corresponding first pMOS and second pMOS transistors are serially cascaded, and
• wherein said second pMOS transistor outputs said substantially constant current to each of said converters.

A large scale integrated circuit, comprising:

• a plurality of clock drivers, each of which operates with a reference voltage;
• a constant current generator configured to generate a substantially constant current and to distribute said substantially constant current to each of said clock drivers, said constant current generator including:
• a plurality of first pMOS (p-channel type Metal-Oxide-Semiconductor) transistors;
• a plurality of second pMOS transistors serially cascaded with said plurality of first pMOS transistors;
• and
• a band gap reference circuit configured to generate a criterion voltage for said first plurality of pMOS transistors;
• a bias circuit configured to generate a gate voltage for said plurality of second pMOS transistors operating in a saturation condition, the constant current generator generating a substantially constant current and distributing said substantially constant current to each of said clock drivers;
• and
• a plurality of converters, each of said converters respectively corresponding to a respective one of said clock drivers, each of said converters converting said substantially constant current to said reference voltage and respectively providing said reference voltage to each of said clock drivers,
• wherein each of;
• plurality of wirings is connected to a drain of a respective one of the second pMOS transistors, and
• wherein said second pMOS transistors output said substantially constant current to each of, said converters.