US 8,710,898 B1Granted

Triple-trim reference voltage generator

AssigneeLattice Semiconductor Corporation

InventorsDavid H. Chiang, Cliff A. Mair

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Abstract

In one embodiment, a bandgap reference circuit is designed with three trimmable elements to generate a temperature-independent bandgap reference voltage VBG: a VBG adjustment resistance ΔR1, a VBG slope adjustment resistance ΔR2, and a curvature compensation adjustment voltage VCU. Instances of the bandgap reference circuit can be trimmed in two phases: a characterization phase during which a triple-trim process determines design-specific trim values for the VBG slope adjustment resistance ΔR2 and the curvature compensation adjustment voltage VCU and a production phase during which a single-trim process determines instance-specific values for the VBG adjustment resistance ΔR1. Since the characterization phase can be applied to a relatively small number of instances of the bandgap reference circuit, the two-phase trimming technique is suitable for efficient mass production and high production yield.

Claims16

Dependent claims

Apparatus comprising a reference voltage generator (e.g., 100, for generating a reference voltage signal (e.g., VBG), the reference voltage generator comprising:

an operational amplifier (op amp) (e.g., 110) having first and second input nodes (e.g., 112, 114) and an output node (e.g., 116), wherein the reference voltage signal appears at the output node of the op amp;
a first resistance (e.g., R1+ΔR1) connected between the output node and one of first and second input nodes (e.g., 112);
a second resistance (e.g., R2+ΔR2) connected to the first input node;
a first transistor device (e.g., Q1) having an emitter connected to the second resistance and a collector connected to a voltage reference node (e.g., ground);
a third resistance (e.g., R3) connected between the output node and the other of the first and second input nodes (e.g., 114) of the op amp;
a second transistor device (e.g., Q2) having an emitter connected to the second input node of the op amp and a collector connected to the voltage reference node:
a curvature compensation adjustment circuitry selectively connected to control nodes of the first and second transistor devices, wherein the first and second resistances and curvature compensation adjustment circuitry are trimmable;
logic circuits and programmable switches (e.g., 120) configured to enable an external programmable tester (e.g., 150) to set:
(a) a first resistance level (e.g., AR1) for the first resistance;
(b) a second resistance level (e.g., ΔR2) for the second resistance;
and
(c) a transistor control voltage (e.g., VCU) applied by the curvature compensation adjustment circuitry to the control nodes of the first and second transistor devices;
wherein the programmable tester and the logic circuits and programmable switches support a characterization phase and a production phase, such that:
during the characterization phase, a design-specific trim value is determined for the second resistance level (e.g., ΔR2) and a design-specific trim value is determined for the transistor control voltage (e.g., VCU);
and
during the production phase, with the second resistance level (e.g., ΔR2) and the transistor control voltage (e.g., VCU) fixed to their design-specific trim values, an instance-specific trim value is determined for the first resistance level (e.g., ΔR1).

13 more elements

Apparatus comprising a reference voltage generator for generating a reference voltage signal, the reference voltage generator comprising:

an operational amplifier (op amp) having first and second input nodes and an output node, wherein the reference voltage signal appears at the output node of the op amp;
a first trimmable resistance connected between the output node and the first input node;
a second trimmable resistance connected to the first input node;
a first transistor device connected between the second resistance and a voltage reference node;
a second transistor device connected between the second input node and the voltage reference node;
curvature compensation adjustment circuitry connected to the first and second transistor devices;
and
programmable switches for enabling an external programmable tester to set:
(a) a first resistance level for the first resistance;
(b) a second resistance level for the second resistance;
and
(c) a transistor control voltage applied by the curvature compensation adjustment circuitry to the first and second transistor devices;
wherein the programmable tester and the programmable switches support a characterization phase and a production phase, such that:
during the characterization phase, a design-specific trim value is determined for the second resistance level and a design-specific trim value is determined for the transistor control voltage;
and
during the production phase, with the second resistance level and the transistor control voltage fixed to their design-specific trim values, an instance-specific trim value is determined for the first resistance level.

13 more elements

A bandgap reference circuit comprising:

an operational amplifier (op amp) having first and second input nodes and an output node;
a first trimmable resistance connected between the output node and the first input node;
a second trimmable resistance connected to the first input node;
a first transistor device connected between the second resistance and a voltage reference node;
a second transistor device connected between the second input node and the voltage reference node;
curvature compensation adjustment circuitry connected to the first and second transistor devices;
and
programmable switches for setting:
(a) a first resistance level for the first resistance;
(b) a second resistance level for the second resistance;
and
(c) a transistor control voltage applied by the curvature compensation adjustment circuitry to the first and second transistor devices;
wherein the programmable tester and the programmable switches support a characterization phase and a production phase, such that:
during the characterization phase, a design-specific trim value is determined for the second resistance level and a design-specific trim value is determined for the transistor control voltage;
and
during the production phase, with the second resistance level and the transistor control voltage fixed to their design-specific trim values, an instance-specific trim value is determined for the first resistance level.

13 more elements

Dependencies are inferred from the claim text.