Voltage regulator structure that is operationally stable for both low and high capacitive loads
AssigneeSTMicroelectronics International N.V.
InventorsRupesh Khare, Nitin Bansal
Life of this patent
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AssigneeSTMicroelectronics International N.V.
InventorsRupesh Khare, Nitin Bansal
Estimating the term…
A regulator structure includes a first differential amplifier having a first input coupled to a reference voltage node. A second differential amplifier has a first input coupled to the output of the first differential amplifier. A third differential amplifier has a first input coupled to the output of the first differential amplifier. A first pmos transistor has its gate coupled to the second differential amplifier output, and its drain coupled to a second input of each of the first and second differential amplifiers. A second pmos transistor has its gate coupled to the third differential amplifier output, and its drain configured to output a regulated voltage which is also a second input of the third differential amplifier. A circuit is configured to replicate the regulated voltage and couple the replicated regulated voltage to the drain of the first pmos transistor.
A regulator structure, comprising:
A regulator structure, comprising:
A system, comprising:
A regulator structure, comprising:
Dependencies are inferred from the claim text.