Electronic device package and fabrication method thereof
OwnerShu-Ming Chang, Bai-Yao Lou +2inventors
InventorsShu-Ming Chang, Bai-Yao Lou, Ying-Nan Wen, Chien-Hung Liu
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Abstract
An electronic device package is disclosed. The package includes at least one semiconductor chip having a first surface and a second surface opposite thereto, in which at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure. At least one abut portion is disposed on the redistribution layer and electrically contacting thereto. A passivation layer covers the first surface of the semiconductor chip and surrounds the abut portion. A substrate is attached onto the second surface of the semiconductor chip. A fabrication method of the electronic device package is also disclosed.
Claims13
An electronic device package, comprising:
- at least one semiconductor chip having a first surface and a second surface opposite thereto, wherein at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure;
- at least one abut portion disposed on the redistribution layer and electrically contacting thereto;
- a passivation layer covering the first surface of the semiconductor chip and surrounding the abut portion, wherein upper surface of the abut portion facing away from the first surface is not recessed;
- and
- a substrate attached onto the second surface of the semiconductor chip.
An electronic device package, comprising:
- at least one semiconductor chip having a first surface and a second surface opposite thereto, wherein at least one redistribution layer is disposed on the first surface of the semiconductor chip and is electrically connected to at least one conductive pad structure;
- at least one abut portion disposed on the redistribution layer and electrically contacting thereto;
- a passivation layer covering the first surface of the semiconductor chip and surrounding the abut portion;
- and
- a substrate attached onto the second surface of the semiconductor chip,
- wherein the abut portion protrudes from an upper surface of the passivation layer and a gap is between the abut portion and the passivation layer.
Dependencies are inferred from the claim text.