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US 8,710,678 B2Granted
Device and method including a soldering process
AssigneeInfineon Technologies AG
InventorsPaul Ganitzer, Francisco Javier Santos Rodriguez, Martin Sporn, Daniel Kraft
Life of this patent
Estimating the term…
Abstract
A device and method of making a device is disclosed. One embodiment provides a substrate. A semiconductor chip is provided having a first surface with a roughness of at least 100 nm. A diffusion soldering process is performed to join the first surface of the semiconductor chip to the substrate.
Claims12
A device, comprising:
- a substrate;
- a semiconductor chip mounted on the substrate, the semiconductor including at least one electrode on an active surface;
- and
- an intermetallic phase located at an interface between the at least one electrode of the semiconductor chip and the substrate, wherein a surface of the at least one electrode of the semiconductor chip at the interface has a rms roughness of at least 100 nm and less than 1500 nm.
1 more element
A device, comprising:
- a substrate;
- a semiconductor chip comprising a semiconductor material at a first surface, the semiconductor material exposed at the first surface having a rms roughness of more than 500 nm and less than 1500 nm;
- at least one metal layer deposited on the first surface of the semiconductor chip, wherein the at least one metal layer has a rms roughness of more than 500 nm and less than 1500 nm;
- and
- wherein the semiconductor chip is coupled to the substrate via the at least one metal layer.
2 more elements
A device, comprising:
- a substrate;
- a semiconductor chip having a roughened surface having a rms roughness of at least 100 nm and less than 1500 nm, wherein the semiconductor chip is mounted to the substrate via the roughened surface with an intermetallic phase, wherein the intermetallic phase is in direct contact with a mounting surface of the substrate and in direct contact with at least a portion of the roughened surface.
A device, comprising:
- a substrate;
- a semiconductor chip having a roughened surface having a roughness of at least 100 nm and less than 1500 nm, wherein the semiconductor chip is mounted to the substrate via the roughened surface with an intermetallic phase, the intermetallic phase is in direct contact with a mounted surface of the substrate and at least portions of the roughened surface, wherein a plurality of microvoids are spaced apart and disposed along the roughened surface of the semiconductor chip between the intermetallic phase and the roughened surface.
A device comprising:
- a substrate;
- and
- a semiconductor chip having a roughened surface, wherein the semiconductor chip is mounted to the substrate via the roughened surface with an intermetallic phase, wherein a plurality of microvoids are spaced apart and disposed along the roughened surface of the semiconductor chip between the intermetallic phase and the roughened surface.
Dependencies are inferred from the claim text.