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US 8,710,668 B2Granted
Integrated circuit packaging system with laser hole and method of manufacture thereof
AssigneeSTATS ChipPAC, Ltd.
InventorsHyungMin Lee, HeeJo Chi, YeongIm Park
Life of this patent
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Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a substrate; molding a first encapsulation above the substrate; forming a via through the first encapsulation; mounting an integrated circuit above the substrate and between sides of the first encapsulation; and forming a second encapsulation covering the integrated circuit and the first encapsulation.
Claims18
A method of manufacture of an integrated circuit packaging system comprising:
- providing a substrate;
- molding a first encapsulation above the substrate;
- forming a via through the first encapsulation;
- mounting an integrated circuit above the substrate and between sides of the first encapsulation;
- forming a second encapsulation covering the integrated circuit and the first encapsulation;
- and
- connecting an external package to the substrate through the via.
4 more elements
A method of manufacture of an integrated circuit packaging system comprising:
- providing a substrate;
- molding a first encapsulation above the substrate and along a perimeter region of the substrate;
- forming a first via through the first encapsulation;
- mounting an integrated circuit between sides of the first encapsulation above the substrate and directly connected to the substrate with an interconnect;
- forming a second encapsulation covering the integrated circuit and the first encapsulation;
- and
- forming a second via through the second encapsulation from the first via and exposed from a top surface of the second encapsulation.
4 more elements
An integrated circuit packaging system comprising:
- a substrate;
- a first encapsulation molded above the substrate, wherein the first encapsulation is formed along a perimeter region of the substrate;
- a first via formed through the first encapsulation;
- an integrated circuit mounted above the substrate and between sides of the first encapsulation, wherein the integrated circuit is directly connected to the substrate with an interconnect;
- a second encapsulation covering the integrated circuit and the first encapsulation;
- and
- a second via formed through the second encapsulation from the first via and exposed from a top surface of the second encapsulation.
4 more elements
Dependencies are inferred from the claim text.